The PWC IP found in the RZ/V2M family of chips fits the Multi-Function
Device (MFD) model quite well, and comes with the below capabilities:
* external power supply on/off sequence generation
* on/off signal generation for the LPDDR4 core power supply (LPVDD)
* key input signals processing
* general-purpose output pins
With this new version I have changed model for the DT/dt-bindings.
I have dropped syscon, simple-mfd, regmap, offset, and the child nodes.
Thanks,
Fab
Fabrizio Castro (4):
dt-bindings: mfd: Add RZ/V2M PWC
mfd: Add RZ/V2M PWC core driver
gpio: Add support for the Renesas RZ/V2M PWC GPIOs
power: reset: Add new driver for RZ/V2M PWC poweroff
.../bindings/mfd/renesas,rzv2m-pwc.yaml | 56 ++++++++++
drivers/gpio/Kconfig | 10 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-rzv2m-pwc.c | 105 ++++++++++++++++++
drivers/mfd/Kconfig | 14 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/rzv2m-pwc.c | 70 ++++++++++++
drivers/mfd/rzv2m-pwc.h | 18 +++
drivers/power/reset/Kconfig | 9 ++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/rzv2m-pwc-poweroff.c | 67 +++++++++++
11 files changed, 352 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
create mode 100644 drivers/gpio/gpio-rzv2m-pwc.c
create mode 100644 drivers/mfd/rzv2m-pwc.c
create mode 100644 drivers/mfd/rzv2m-pwc.h
create mode 100644 drivers/power/reset/rzv2m-pwc-poweroff.c
--
2.34.1
The RZ/V2M PWC IP controls external power supplies and therefore
can turn the power supplies off when powering down the system.
Add driver to poweroff the system.
Signed-off-by: Fabrizio Castro <[email protected]>
---
v1->v2: Dropped OF match table and syscon as a result of the change in
DT model
drivers/power/reset/Kconfig | 9 ++++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/rzv2m-pwc-poweroff.c | 67 ++++++++++++++++++++++++
3 files changed, 77 insertions(+)
create mode 100644 drivers/power/reset/rzv2m-pwc-poweroff.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index a8c46ba5878f..1fcf691ae68e 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -303,4 +303,13 @@ config POWER_MLXBF
help
This driver supports reset or low power mode handling for Mellanox BlueField.
+config POWER_RESET_RZV2M_PWC
+ tristate "Renesas RZ/V2M PWC Power OFF support"
+ depends on MFD_RZV2M_PWC_CORE || COMPILE_TEST
+ help
+ The RZ/V2M PWC IP controls external power supplies and therefore can
+ turn the power supplies off when powering down the system.
+ Enable this driver when PWC is in control of the system power supplies
+ and it's the preferred way to shutdown the system.
+
endif
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 0a39424fc558..f05a8abff2eb 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -36,3 +36,4 @@ obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
obj-$(CONFIG_POWER_RESET_SC27XX) += sc27xx-poweroff.o
obj-$(CONFIG_NVMEM_REBOOT_MODE) += nvmem-reboot-mode.o
obj-$(CONFIG_POWER_MLXBF) += pwr-mlxbf.o
+obj-$(CONFIG_POWER_RESET_RZV2M_PWC) += rzv2m-pwc-poweroff.o
diff --git a/drivers/power/reset/rzv2m-pwc-poweroff.c b/drivers/power/reset/rzv2m-pwc-poweroff.c
new file mode 100644
index 000000000000..f5bc383c22e1
--- /dev/null
+++ b/drivers/power/reset/rzv2m-pwc-poweroff.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * Reset driver for Renesas RZ/V2M External Power Sequence Controller (PWC)
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/reboot.h>
+#include "../../mfd/rzv2m-pwc.h"
+
+#define PWC_PWCRST_RSTSOFTAX 0x1
+#define PWC_PWCCKEN_ENGCKMAIN 0x1
+#define PWC_PWCCTL_PWOFF 0x1
+
+struct rzv2m_pwc_poweroff_priv {
+ void __iomem *base;
+ struct device *dev;
+};
+
+static int rzv2m_pwc_poweroff(struct sys_off_data *data)
+{
+ struct rzv2m_pwc_poweroff_priv *priv =
+ (struct rzv2m_pwc_poweroff_priv *)data->cb_data;
+
+ writel(PWC_PWCRST_RSTSOFTAX, priv->base + PWC_PWCRST);
+ writel(PWC_PWCCKEN_ENGCKMAIN, priv->base + PWC_PWCCKEN);
+ writel(PWC_PWCCTL_PWOFF, priv->base + PWC_PWCCTL);
+
+ mdelay(150);
+
+ dev_err(priv->dev, "Failed to power off the system");
+
+ return NOTIFY_DONE;
+}
+
+static int rzv2m_pwc_poweroff_probe(struct platform_device *pdev)
+{
+ struct rzv2m_pwc_priv *pdata = dev_get_drvdata(pdev->dev.parent);
+ struct rzv2m_pwc_poweroff_priv *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->base = pdata->base;
+ priv->dev = &pdev->dev;
+
+ return devm_register_power_off_handler(&pdev->dev, rzv2m_pwc_poweroff,
+ priv);
+}
+
+static struct platform_driver rzv2m_pwc_poweroff_driver = {
+ .probe = rzv2m_pwc_poweroff_probe,
+ .driver = {
+ .name = "rzv2m_pwc_poweroff",
+ },
+};
+module_platform_driver(rzv2m_pwc_poweroff_driver);
+
+MODULE_ALIAS("platform:rzv2m_pwc_poweroff");
+MODULE_SOFTDEP("pre: rzv2m_pwc");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Fabrizio Castro <[email protected]>");
+MODULE_DESCRIPTION("Renesas RZ/V2M PWC power OFF driver");
--
2.34.1
The RZ/V2M SoC contains an External Power Sequence Controller
(PWC) module. The PWC module provides an external power supply
on/off sequence, on/off signal for the LPDDR4 core power supply,
General-Purpose Outputs, and key input signals.
Add a driver for controlling the General-Purpose Outputs.
Signed-off-by: Fabrizio Castro <[email protected]>
---
v1->v2: Dropped OF match table and syscon as a result of the change in
DT model
drivers/gpio/Kconfig | 10 ++++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-rzv2m-pwc.c | 105 ++++++++++++++++++++++++++++++++++
3 files changed, 116 insertions(+)
create mode 100644 drivers/gpio/gpio-rzv2m-pwc.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ec7cfd4f52b1..4c77fb6966e0 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -553,6 +553,16 @@ config GPIO_ROCKCHIP
help
Say yes here to support GPIO on Rockchip SoCs.
+config GPIO_RZV2M_PWC
+ tristate "Renesas RZ/V2M PWC GPIO support"
+ depends on MFD_RZV2M_PWC_CORE || COMPILE_TEST
+ help
+ Say yes here to support the External Power Sequence Controller (PWC)
+ GPIO controller driver for RZ/V2M devices.
+
+ The PWSDxSEL pins can be used as General-Purpose Ouputs.
+ Their output is low by default.
+
config GPIO_SAMA5D2_PIOBU
tristate "SAMA5D2 PIOBU GPIO support"
depends on MFD_SYSCON
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 010587025fc8..a5c159ae9db5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -132,6 +132,7 @@ obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
obj-$(CONFIG_GPIO_REALTEK_OTTO) += gpio-realtek-otto.o
obj-$(CONFIG_GPIO_REG) += gpio-reg.o
obj-$(CONFIG_GPIO_ROCKCHIP) += gpio-rockchip.o
+obj-$(CONFIG_GPIO_RZV2M_PWC) += gpio-rzv2m-pwc.o
obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o
obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o
obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
diff --git a/drivers/gpio/gpio-rzv2m-pwc.c b/drivers/gpio/gpio-rzv2m-pwc.c
new file mode 100644
index 000000000000..19bdb949b3d3
--- /dev/null
+++ b/drivers/gpio/gpio-rzv2m-pwc.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2022 Renesas Electronics Corporation
+ *
+ * GPIO driver for Renesas RZ/V2M External Power Sequence Controller (PWC)
+ */
+
+#include <linux/gpio/driver.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include "../mfd/rzv2m-pwc.h"
+
+struct rzv2m_pwc_gpio_priv {
+ void __iomem *base;
+ struct gpio_chip gp;
+ DECLARE_BITMAP(ch_en_bits, 2);
+};
+
+static void rzv2m_pwc_gpio_set(struct gpio_chip *chip, unsigned int offset,
+ int value)
+{
+ struct rzv2m_pwc_gpio_priv *priv = gpiochip_get_data(chip);
+ u32 reg;
+
+ /* BIT 16 enables write to BIT 0, and BIT 17 enables write to BIT 1 */
+ reg = BIT(offset + 16);
+ if (value)
+ reg |= BIT(offset);
+
+ writel(reg, priv->base + PWC_GPIO);
+
+ if (value)
+ set_bit(offset, priv->ch_en_bits);
+ else
+ clear_bit(offset, priv->ch_en_bits);
+}
+
+static int rzv2m_pwc_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+ struct rzv2m_pwc_gpio_priv *priv = gpiochip_get_data(chip);
+
+ return test_bit(offset, priv->ch_en_bits);
+}
+
+static int rzv2m_pwc_gpio_direction_output(struct gpio_chip *gc,
+ unsigned int nr, int value)
+{
+ if (nr > 1)
+ return -EINVAL;
+
+ rzv2m_pwc_gpio_set(gc, nr, value);
+
+ return 0;
+}
+
+static const struct gpio_chip rzv2m_pwc_gc = {
+ .label = "gpio_rzv2m_pwc",
+ .owner = THIS_MODULE,
+ .get = rzv2m_pwc_gpio_get,
+ .set = rzv2m_pwc_gpio_set,
+ .direction_output = rzv2m_pwc_gpio_direction_output,
+ .can_sleep = false,
+ .ngpio = 2,
+ .base = -1,
+};
+
+static int rzv2m_pwc_gpio_probe(struct platform_device *pdev)
+{
+ struct rzv2m_pwc_priv *pdata = dev_get_drvdata(pdev->dev.parent);
+ struct rzv2m_pwc_gpio_priv *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->base = pdata->base;
+ /*
+ * The register used by this driver cannot be read, therefore set the
+ * outputs to their default values and initialize priv->ch_en_bits
+ * accordingly. BIT 16 enables write to BIT 0, BIT 17 enables write to
+ * BIT 1, and the default value of both BIT 0 and BIT 1 is 0.
+ */
+ writel(BIT(17) | BIT(16), priv->base + PWC_GPIO);
+ bitmap_zero(priv->ch_en_bits, 2);
+
+ priv->gp = rzv2m_pwc_gc;
+ priv->gp.parent = pdev->dev.parent;
+ priv->gp.fwnode = dev_fwnode(pdev->dev.parent);
+
+ return devm_gpiochip_add_data(&pdev->dev, &priv->gp, priv);
+}
+
+static struct platform_driver rzv2m_pwc_gpio_driver = {
+ .probe = rzv2m_pwc_gpio_probe,
+ .driver = {
+ .name = "gpio_rzv2m_pwc",
+ },
+};
+module_platform_driver(rzv2m_pwc_gpio_driver);
+
+MODULE_ALIAS("platform:gpio_rzv2m_pwc");
+MODULE_SOFTDEP("pre: rzv2m_pwc");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Fabrizio Castro <[email protected]>");
+MODULE_DESCRIPTION("Renesas RZ/V2M PWC GPIO");
--
2.34.1
The Renesas RZ/V2M External Power Sequence Controller (PWC)
IP is a multi-function device, and it's capable of:
* external power supply on/off sequence generation
* on/off signal generation for the LPDDR4 core power supply (LPVDD)
* key input signals processing
* general-purpose output pins
Add the corresponding dt-bindings.
Signed-off-by: Fabrizio Castro <[email protected]>
---
v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes.
.../bindings/mfd/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
new file mode 100644
index 000000000000..e6794c5152d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/renesas,rzv2m-pwc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M External Power Sequence Controller (PWC)
+
+description: |+
+ The PWC IP found in the RZ/V2M family of chips comes with the below
+ capabilities
+ - external power supply on/off sequence generation
+ - on/off signal generation for the LPDDR4 core power supply (LPVDD)
+ - key input signals processing
+ - general-purpose output pins
+
+maintainers:
+ - Fabrizio Castro <[email protected]>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r9a09g011-pwc # RZ/V2M
+ - renesas,r9a09g055-pwc # RZ/V2MA
+ - const: renesas,rzv2m-pwc
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ renesas,rzv2m-pwc-power:
+ description: The PWC is used to control the system power supplies.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ pwc: pwc@a3700000 {
+ compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
+ reg = <0xa3700000 0x800>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ renesas,rzv2m-pwc-power;
+ };
--
2.34.1
On Wed, 21 Dec 2022 21:09:14 +0000, Fabrizio Castro wrote:
> The Renesas RZ/V2M External Power Sequence Controller (PWC)
> IP is a multi-function device, and it's capable of:
> * external power supply on/off sequence generation
> * on/off signal generation for the LPDDR4 core power supply (LPVDD)
> * key input signals processing
> * general-purpose output pins
>
> Add the corresponding dt-bindings.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
> ---
>
> v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes.
>
> .../bindings/mfd/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++
> 1 file changed, 56 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
>
Reviewed-by: Rob Herring <[email protected]>
On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro
<[email protected]> wrote:
> The RZ/V2M SoC contains an External Power Sequence Controller
> (PWC) module. The PWC module provides an external power supply
> on/off sequence, on/off signal for the LPDDR4 core power supply,
> General-Purpose Outputs, and key input signals.
>
> Add a driver for controlling the General-Purpose Outputs.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
This is a nice driver.
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
Hi,
On Wed, Dec 21, 2022 at 09:09:17PM +0000, Fabrizio Castro wrote:
> The RZ/V2M PWC IP controls external power supplies and therefore
> can turn the power supplies off when powering down the system.
>
> Add driver to poweroff the system.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
> ---
Acked-by: Sebastian Reichel <[email protected]>
-- Sebastian
>
> v1->v2: Dropped OF match table and syscon as a result of the change in
> DT model
>
> drivers/power/reset/Kconfig | 9 ++++
> drivers/power/reset/Makefile | 1 +
> drivers/power/reset/rzv2m-pwc-poweroff.c | 67 ++++++++++++++++++++++++
> 3 files changed, 77 insertions(+)
> create mode 100644 drivers/power/reset/rzv2m-pwc-poweroff.c
>
> diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
> index a8c46ba5878f..1fcf691ae68e 100644
> --- a/drivers/power/reset/Kconfig
> +++ b/drivers/power/reset/Kconfig
> @@ -303,4 +303,13 @@ config POWER_MLXBF
> help
> This driver supports reset or low power mode handling for Mellanox BlueField.
>
> +config POWER_RESET_RZV2M_PWC
> + tristate "Renesas RZ/V2M PWC Power OFF support"
> + depends on MFD_RZV2M_PWC_CORE || COMPILE_TEST
> + help
> + The RZ/V2M PWC IP controls external power supplies and therefore can
> + turn the power supplies off when powering down the system.
> + Enable this driver when PWC is in control of the system power supplies
> + and it's the preferred way to shutdown the system.
> +
> endif
> diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
> index 0a39424fc558..f05a8abff2eb 100644
> --- a/drivers/power/reset/Makefile
> +++ b/drivers/power/reset/Makefile
> @@ -36,3 +36,4 @@ obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
> obj-$(CONFIG_POWER_RESET_SC27XX) += sc27xx-poweroff.o
> obj-$(CONFIG_NVMEM_REBOOT_MODE) += nvmem-reboot-mode.o
> obj-$(CONFIG_POWER_MLXBF) += pwr-mlxbf.o
> +obj-$(CONFIG_POWER_RESET_RZV2M_PWC) += rzv2m-pwc-poweroff.o
> diff --git a/drivers/power/reset/rzv2m-pwc-poweroff.c b/drivers/power/reset/rzv2m-pwc-poweroff.c
> new file mode 100644
> index 000000000000..f5bc383c22e1
> --- /dev/null
> +++ b/drivers/power/reset/rzv2m-pwc-poweroff.c
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2022 Renesas Electronics Corporation
> + *
> + * Reset driver for Renesas RZ/V2M External Power Sequence Controller (PWC)
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +#include <linux/reboot.h>
> +#include "../../mfd/rzv2m-pwc.h"
> +
> +#define PWC_PWCRST_RSTSOFTAX 0x1
> +#define PWC_PWCCKEN_ENGCKMAIN 0x1
> +#define PWC_PWCCTL_PWOFF 0x1
> +
> +struct rzv2m_pwc_poweroff_priv {
> + void __iomem *base;
> + struct device *dev;
> +};
> +
> +static int rzv2m_pwc_poweroff(struct sys_off_data *data)
> +{
> + struct rzv2m_pwc_poweroff_priv *priv =
> + (struct rzv2m_pwc_poweroff_priv *)data->cb_data;
> +
> + writel(PWC_PWCRST_RSTSOFTAX, priv->base + PWC_PWCRST);
> + writel(PWC_PWCCKEN_ENGCKMAIN, priv->base + PWC_PWCCKEN);
> + writel(PWC_PWCCTL_PWOFF, priv->base + PWC_PWCCTL);
> +
> + mdelay(150);
> +
> + dev_err(priv->dev, "Failed to power off the system");
> +
> + return NOTIFY_DONE;
> +}
> +
> +static int rzv2m_pwc_poweroff_probe(struct platform_device *pdev)
> +{
> + struct rzv2m_pwc_priv *pdata = dev_get_drvdata(pdev->dev.parent);
> + struct rzv2m_pwc_poweroff_priv *priv;
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->base = pdata->base;
> + priv->dev = &pdev->dev;
> +
> + return devm_register_power_off_handler(&pdev->dev, rzv2m_pwc_poweroff,
> + priv);
> +}
> +
> +static struct platform_driver rzv2m_pwc_poweroff_driver = {
> + .probe = rzv2m_pwc_poweroff_probe,
> + .driver = {
> + .name = "rzv2m_pwc_poweroff",
> + },
> +};
> +module_platform_driver(rzv2m_pwc_poweroff_driver);
> +
> +MODULE_ALIAS("platform:rzv2m_pwc_poweroff");
> +MODULE_SOFTDEP("pre: rzv2m_pwc");
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Fabrizio Castro <[email protected]>");
> +MODULE_DESCRIPTION("Renesas RZ/V2M PWC power OFF driver");
> --
> 2.34.1
>
Hi Fabrizio,
On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro
<[email protected]> wrote:
> The Renesas RZ/V2M External Power Sequence Controller (PWC)
> IP is a multi-function device, and it's capable of:
> * external power supply on/off sequence generation
> * on/off signal generation for the LPDDR4 core power supply (LPVDD)
> * key input signals processing
> * general-purpose output pins
>
> Add the corresponding dt-bindings.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
> ---
>
> v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes.
Thanks for the update!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/renesas,rzv2m-pwc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/V2M External Power Sequence Controller (PWC)
> +
> +description: |+
> + The PWC IP found in the RZ/V2M family of chips comes with the below
> + capabilities
> + - external power supply on/off sequence generation
> + - on/off signal generation for the LPDDR4 core power supply (LPVDD)
> + - key input signals processing
> + - general-purpose output pins
> +
> +maintainers:
> + - Fabrizio Castro <[email protected]>
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - renesas,r9a09g011-pwc # RZ/V2M
> + - renesas,r9a09g055-pwc # RZ/V2MA
> + - const: renesas,rzv2m-pwc
> +
> + reg:
> + maxItems: 1
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + renesas,rzv2m-pwc-power:
> + description: The PWC is used to control the system power supplies.
> + type: boolean
I'm wondering if there is some other way to represent this, e.g.
using DT topology? Some regulator relation?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Fabrizio,
On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro
<[email protected]> wrote:
> The RZ/V2M PWC IP controls external power supplies and therefore
> can turn the power supplies off when powering down the system.
>
> Add driver to poweroff the system.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
> ---
>
> v1->v2: Dropped OF match table and syscon as a result of the change in
> DT model
Thanks for your patch!
> --- /dev/null
> +++ b/drivers/power/reset/rzv2m-pwc-poweroff.c
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2022 Renesas Electronics Corporation
> + *
> + * Reset driver for Renesas RZ/V2M External Power Sequence Controller (PWC)
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/io.h>
> +#include <linux/platform_device.h>
> +#include <linux/reboot.h>
> +#include "../../mfd/rzv2m-pwc.h"
> +
> +#define PWC_PWCRST_RSTSOFTAX 0x1
> +#define PWC_PWCCKEN_ENGCKMAIN 0x1
> +#define PWC_PWCCTL_PWOFF 0x1
> +
> +struct rzv2m_pwc_poweroff_priv {
> + void __iomem *base;
> + struct device *dev;
> +};
> +
> +static int rzv2m_pwc_poweroff(struct sys_off_data *data)
> +{
> + struct rzv2m_pwc_poweroff_priv *priv =
> + (struct rzv2m_pwc_poweroff_priv *)data->cb_data;
No need for this cast.
> +
> + writel(PWC_PWCRST_RSTSOFTAX, priv->base + PWC_PWCRST);
> + writel(PWC_PWCCKEN_ENGCKMAIN, priv->base + PWC_PWCCKEN);
> + writel(PWC_PWCCTL_PWOFF, priv->base + PWC_PWCCTL);
> +
> + mdelay(150);
> +
> + dev_err(priv->dev, "Failed to power off the system");
> +
> + return NOTIFY_DONE;
> +}
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Thanks for your feedback!
> From: Geert Uytterhoeven <[email protected]>
> Sent: 03 January 2023 08:29
> Subject: Re: [PATCH v2 1/4] dt-bindings: mfd: Add RZ/V2M PWC
>
> Hi Fabrizio,
>
> On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro
> <[email protected]> wrote:
> > The Renesas RZ/V2M External Power Sequence Controller (PWC)
> > IP is a multi-function device, and it's capable of:
> > * external power supply on/off sequence generation
> > * on/off signal generation for the LPDDR4 core power supply (LPVDD)
> > * key input signals processing
> > * general-purpose output pins
> >
> > Add the corresponding dt-bindings.
> >
> > Signed-off-by: Fabrizio Castro <[email protected]>
> > ---
> >
> > v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child
> nodes.
>
> Thanks for the update!
>
> > + renesas,rzv2m-pwc-power:
> > + description: The PWC is used to control the system power supplies.
> > + type: boolean
>
> I'm wondering if there is some other way to represent this, e.g.
> using DT topology? Some regulator relation?
Not that I can think of. With respect to power, this IP only generates
control (enable) signals for external regulators, it does not supply
power.
Thanks,
Fab
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Hi Geert,
Thanks for your feedback!
>
> Hi Fabrizio,
>
> On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro
> <[email protected]> wrote:
> > The RZ/V2M PWC IP controls external power supplies and therefore
> > can turn the power supplies off when powering down the system.
> >
> > Add driver to poweroff the system.
> >
> > Signed-off-by: Fabrizio Castro <[email protected]>
> > ---
> >
> > v1->v2: Dropped OF match table and syscon as a result of the change in
> > DT model
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/drivers/power/reset/rzv2m-pwc-poweroff.c
> > @@ -0,0 +1,67 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2022 Renesas Electronics Corporation
> > + *
> > + * Reset driver for Renesas RZ/V2M External Power Sequence Controller
> (PWC)
> > + */
> > +
> > +#include <linux/delay.h>
> > +#include <linux/io.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reboot.h>
> > +#include "../../mfd/rzv2m-pwc.h"
> > +
> > +#define PWC_PWCRST_RSTSOFTAX 0x1
> > +#define PWC_PWCCKEN_ENGCKMAIN 0x1
> > +#define PWC_PWCCTL_PWOFF 0x1
> > +
> > +struct rzv2m_pwc_poweroff_priv {
> > + void __iomem *base;
> > + struct device *dev;
> > +};
> > +
> > +static int rzv2m_pwc_poweroff(struct sys_off_data *data)
> > +{
> > + struct rzv2m_pwc_poweroff_priv *priv =
> > + (struct rzv2m_pwc_poweroff_priv *)data->cb_data;
>
> No need for this cast.
Thanks for pointing this out. I'll fix that in v3.
Thanks,
Fab
>
> > +
> > + writel(PWC_PWCRST_RSTSOFTAX, priv->base + PWC_PWCRST);
> > + writel(PWC_PWCCKEN_ENGCKMAIN, priv->base + PWC_PWCCKEN);
> > + writel(PWC_PWCCTL_PWOFF, priv->base + PWC_PWCCTL);
> > +
> > + mdelay(150);
> > +
> > + dev_err(priv->dev, "Failed to power off the system");
> > +
> > + return NOTIFY_DONE;
> > +}
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker.
> But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds