2022-02-12 23:33:12

by Sergey Shtylyov

Subject: [PATCH v2] sh: avoid using IRQ0 on SH3/4

Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify
that code to start the IRQ #s from 16 instead.

[1] https://lore.kernel.org/all/[email protected]/

Signed-off-by: Sergey Shtylyov <[email protected]>

---
The patch is against Linus Torvalds' 'linux.git' repo.

Changes in version 2:
- changed cmp/ge to cmp/hs in the assembly code.

arch/sh/kernel/cpu/sh3/entry.S | 4 ++--
include/linux/sh_intc.h | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)

Index: linux/arch/sh/kernel/cpu/sh3/entry.S
===================================================================
--- linux.orig/arch/sh/kernel/cpu/sh3/entry.S
+++ linux/arch/sh/kernel/cpu/sh3/entry.S
@@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
mov r4, r0 ! save vector->jmp table offset for later

shlr2 r4 ! vector to IRQ# conversion
- add #-0x10, r4

- cmp/pz r4 ! is it a valid IRQ?
+ mov #0x10, r5
+ cmp/hs r5, r4 ! is it a valid IRQ?
bt 10f

/*
Index: linux/include/linux/sh_intc.h
===================================================================
--- linux.orig/include/linux/sh_intc.h
+++ linux/include/linux/sh_intc.h
@@ -13,9 +13,9 @@
/*
* Convert back and forth between INTEVT and IRQ values.
*/
-#ifdef CONFIG_CPU_HAS_INTEVT
-#define evt2irq(evt) (((evt) >> 5) - 16)
-#define irq2evt(irq) (((irq) + 16) << 5)
+#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */
+#define evt2irq(evt) ((evt) >> 5)
+#define irq2evt(irq) ((irq) << 5)
#else
#define evt2irq(evt) (evt)
#define irq2evt(irq) (irq)

2022-02-14 21:22:09

by Geert Uytterhoeven

Subject: Re: [PATCH v2] sh: avoid using IRQ0 on SH3/4

Hi Sergey,

On Mon, Feb 14, 2022 at 9:32 AM Sergey Shtylyov <[email protected]> wrote:
> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify
> that code to start the IRQ #s from 16 instead.
>
> [1] https://lore.kernel.org/all/[email protected]/
>
> Signed-off-by: Sergey Shtylyov <[email protected]>
>
> ---
> The patch is against Linus Torvalds' 'linux.git' repo.
>
> Changes in version 2:
> - changed cmp/ge to cmp/hs in the assembly code.

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <[email protected]>

Works fine on rts7751r2d (qemu) and landisk (real).
None of them had IRQ0, though, but dmesg and /proc/interrupts
confirm the shift by 16.
Tested-by: Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2022-03-14 02:46:22

by Sergey Shtylyov

Subject: Re: [PATCH v2] sh: avoid using IRQ0 on SH3/4

On 2/11/22 11:51 PM, Sergey Shtylyov wrote:

> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify
> that code to start the IRQ #s from 16 instead.
>
> [1] https://lore.kernel.org/all/[email protected]/
>
> Signed-off-by: Sergey Shtylyov <[email protected]>

Now, after the patch has been tested, I'd really appreciate if it would appear
in 5.18.

[...]

MBR, Sergey