Currently, riscv_pmu_event_set_period updates the userpage mapping.
However, the caller of riscv_pmu_event_set_period should update
the userpage mapping because the counter can not be updated/started
from set_period function in counter overflow path.
Invoke the perf_event_update_userpage at the caller so that it
doesn't get invoked twice during counter start path.
Fixes: f5bfa23f576f ("RISC-V: Add a perf core library for pmu drivers")
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
---
drivers/perf/riscv_pmu.c | 1 -
drivers/perf/riscv_pmu_sbi.c | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
index b2b8d2074ed0..130b9f1a40e0 100644
--- a/drivers/perf/riscv_pmu.c
+++ b/drivers/perf/riscv_pmu.c
@@ -170,7 +170,6 @@ int riscv_pmu_event_set_period(struct perf_event *event)
left = (max_period >> 1);
local64_set(&hwc->prev_count, (u64)-left);
- perf_event_update_userpage(event);
return overflow;
}
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 0cb694b794ae..3735337a4cfb 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -532,6 +532,7 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1,
flag, init_val, 0, 0);
#endif
+ perf_event_update_userpage(event);
}
ctr_ovf_mask = ctr_ovf_mask >> 1;
idx++;
--
2.25.1
Good catch, Is there any bug report?
Anyway:
Reviewed-by: Guo Ren <[email protected]>
On Tue, Jul 12, 2022 at 1:46 AM Atish Patra <[email protected]> wrote:
>
> Currently, riscv_pmu_event_set_period updates the userpage mapping.
> However, the caller of riscv_pmu_event_set_period should update
> the userpage mapping because the counter can not be updated/started
> from set_period function in counter overflow path.
>
> Invoke the perf_event_update_userpage at the caller so that it
> doesn't get invoked twice during counter start path.
>
> Fixes: f5bfa23f576f ("RISC-V: Add a perf core library for pmu drivers")
>
> Reviewed-by: Anup Patel <[email protected]>
> Signed-off-by: Atish Patra <[email protected]>
> ---
> drivers/perf/riscv_pmu.c | 1 -
> drivers/perf/riscv_pmu_sbi.c | 1 +
> 2 files changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
> index b2b8d2074ed0..130b9f1a40e0 100644
> --- a/drivers/perf/riscv_pmu.c
> +++ b/drivers/perf/riscv_pmu.c
> @@ -170,7 +170,6 @@ int riscv_pmu_event_set_period(struct perf_event *event)
> left = (max_period >> 1);
>
> local64_set(&hwc->prev_count, (u64)-left);
> - perf_event_update_userpage(event);
>
> return overflow;
> }
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 0cb694b794ae..3735337a4cfb 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -532,6 +532,7 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
> sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1,
> flag, init_val, 0, 0);
> #endif
> + perf_event_update_userpage(event);
> }
> ctr_ovf_mask = ctr_ovf_mask >> 1;
> idx++;
> --
> 2.25.1
>
--
Best Regards
Guo Ren
On Mon, Jul 11, 2022 at 6:54 PM Guo Ren <[email protected]> wrote:
>
> Good catch, Is there any bug report?
>
Not that I know of.
> Anyway:
> Reviewed-by: Guo Ren <[email protected]>
>
>
> On Tue, Jul 12, 2022 at 1:46 AM Atish Patra <[email protected]> wrote:
> >
> > Currently, riscv_pmu_event_set_period updates the userpage mapping.
> > However, the caller of riscv_pmu_event_set_period should update
> > the userpage mapping because the counter can not be updated/started
> > from set_period function in counter overflow path.
> >
> > Invoke the perf_event_update_userpage at the caller so that it
> > doesn't get invoked twice during counter start path.
> >
> > Fixes: f5bfa23f576f ("RISC-V: Add a perf core library for pmu drivers")
> >
> > Reviewed-by: Anup Patel <[email protected]>
> > Signed-off-by: Atish Patra <[email protected]>
> > ---
> > drivers/perf/riscv_pmu.c | 1 -
> > drivers/perf/riscv_pmu_sbi.c | 1 +
> > 2 files changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c
> > index b2b8d2074ed0..130b9f1a40e0 100644
> > --- a/drivers/perf/riscv_pmu.c
> > +++ b/drivers/perf/riscv_pmu.c
> > @@ -170,7 +170,6 @@ int riscv_pmu_event_set_period(struct perf_event *event)
> > left = (max_period >> 1);
> >
> > local64_set(&hwc->prev_count, (u64)-left);
> > - perf_event_update_userpage(event);
> >
> > return overflow;
> > }
> > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> > index 0cb694b794ae..3735337a4cfb 100644
> > --- a/drivers/perf/riscv_pmu_sbi.c
> > +++ b/drivers/perf/riscv_pmu_sbi.c
> > @@ -532,6 +532,7 @@ static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu,
> > sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1,
> > flag, init_val, 0, 0);
> > #endif
> > + perf_event_update_userpage(event);
> > }
> > ctr_ovf_mask = ctr_ovf_mask >> 1;
> > idx++;
> > --
> > 2.25.1
> >
>
>
> --
> Best Regards
> Guo Ren
--
Regards,
Atish