2019-11-25 06:51:28

by Radhey Shyam Pandey

Subject: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all

Reset DMA channel after stop to ensure that pending transfers and FIFOs
in the datapath are flushed or completed. It fixes intermittent data
verification failure reported by xilinx dma test client.

Signed-off-by: Radhey Shyam Pandey <[email protected]>
---
drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index a9c5d5c..6f1539c 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
u32 reg;
int err;

- if (chan->cyclic)
- xilinx_dma_chan_reset(chan);
-
- err = chan->stop_transfer(chan);
- if (err) {
- dev_err(chan->dev, "Cannot stop channel %p: %x\n",
- chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
- chan->err = true;
+ if (!chan->cyclic) {
+ err = chan->stop_transfer(chan);
+ if (err) {
+ dev_err(chan->dev, "Cannot stop channel %p: %x\n",
+ chan, dma_ctrl_read(chan,
+ XILINX_DMA_REG_DMASR));
+ chan->err = true;
+ }
}

+ xilinx_dma_chan_reset(chan);
/* Remove and free all of the descriptors in the lists */
xilinx_dma_free_descriptors(chan);
chan->idle = true;
--
2.7.4

2019-12-10 06:02:00

by Vinod Koul

Subject: Re: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all

On 25-11-19, 12:12, Radhey Shyam Pandey wrote:
> Reset DMA channel after stop to ensure that pending transfers and FIFOs
> in the datapath are flushed or completed. It fixes intermittent data
> verification failure reported by xilinx dma test client.
>
> Signed-off-by: Radhey Shyam Pandey <[email protected]>
> ---
> drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index a9c5d5c..6f1539c 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
> u32 reg;
> int err;
>
> - if (chan->cyclic)
> - xilinx_dma_chan_reset(chan);

So reset is required for non cyclic cases as well now?

> -
> - err = chan->stop_transfer(chan);
> - if (err) {
> - dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> - chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
> - chan->err = true;
> + if (!chan->cyclic) {
> + err = chan->stop_transfer(chan);

no stop for cyclic now..?

> + if (err) {
> + dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> + chan, dma_ctrl_read(chan,
> + XILINX_DMA_REG_DMASR));
> + chan->err = true;
> + }
> }
>
> + xilinx_dma_chan_reset(chan);
> /* Remove and free all of the descriptors in the lists */
> xilinx_dma_free_descriptors(chan);
> chan->idle = true;
> --
> 2.7.4

--
~Vinod

2019-12-11 14:47:47

by Radhey Shyam Pandey

Subject: RE: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all

> -----Original Message-----
> From: Vinod Koul <[email protected]>
> Sent: Tuesday, December 10, 2019 11:31 AM
> To: Radhey Shyam Pandey <[email protected]>
> Cc: [email protected]; Michal Simek <[email protected]>;
> [email protected]; [email protected]; Appana Durga
> Kedareswara Rao <[email protected]>; [email protected];
> [email protected]; [email protected]; git
> <[email protected]>
> Subject: Re: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in
> dma_terminate_all
>
> On 25-11-19, 12:12, Radhey Shyam Pandey wrote:
> > Reset DMA channel after stop to ensure that pending transfers and
> > FIFOs in the datapath are flushed or completed. It fixes intermittent
> > data verification failure reported by xilinx dma test client.
> >
> > Signed-off-by: Radhey Shyam Pandey <[email protected]>
> > ---
> > drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
> > 1 file changed, 9 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/dma/xilinx/xilinx_dma.c
> > b/drivers/dma/xilinx/xilinx_dma.c index a9c5d5c..6f1539c 100644
> > --- a/drivers/dma/xilinx/xilinx_dma.c
> > +++ b/drivers/dma/xilinx/xilinx_dma.c
> > @@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct
> dma_chan *dchan)
> > u32 reg;
> > int err;
> >
> > - if (chan->cyclic)
> > - xilinx_dma_chan_reset(chan);
>
> So reset is required for non cyclic cases as well now?

Yes. In absence of reset in non-cyclic case, when dmatest client
driver is stressed and loaded/unloaded multiple times we see dma
data comparison failures. Possibly IP is prefetching/holding the
previous state and reset ensures a clean state on each iteration.
>
> > -
> > - err = chan->stop_transfer(chan);
> > - if (err) {
> > - dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > - chan, dma_ctrl_read(chan,
> XILINX_DMA_REG_DMASR));
> > - chan->err = true;
> > + if (!chan->cyclic) {
> > + err = chan->stop_transfer(chan);
>
> no stop for cyclic now..?
After reset stop is not needed, so for the cyclic mode we only do reset.

>
> > + if (err) {
> > + dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > + chan, dma_ctrl_read(chan,
> > + XILINX_DMA_REG_DMASR));
> > + chan->err = true;
> > + }
> > }
> >
> > + xilinx_dma_chan_reset(chan);
> > /* Remove and free all of the descriptors in the lists */
> > xilinx_dma_free_descriptors(chan);
> > chan->idle = true;
> > --
> > 2.7.4
>
> --
> ~Vinod