Hi,
I wonder why imx8mq.dtsi, imx8mm.dtsi and imx8mn.dtsi have
'assigned-clocks' and 'assigned-clock-rates' set for all usdhc nodes,
except for usdhc2.
Is this on purpose? Is it a flaw?
Thanks,
Frieder
Extract from imx8mm.dtsi:
usdhc1: mmc@30b40000 {
[...]
assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
assigned-clock-rates = <400000000>;
[...]
};
usdhc2: mmc@30b50000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
<&clk IMX8MM_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
bus-width = <4>;
status = "disabled";
};
usdhc3: mmc@30b60000 {
[...]
assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
assigned-clock-rates = <400000000>;
[...]
};
Hi, Schrempf
> Hi,
>
> I wonder why imx8mq.dtsi, imx8mm.dtsi and imx8mn.dtsi have 'assigned-
> clocks' and 'assigned-clock-rates' set for all usdhc nodes, except for usdhc2.
>
> Is this on purpose? Is it a flaw?
I don't think it is on purpose, it should be a flaw, I will double check with our usdhc owner,
if it is indeed a flaw, we will summit a patch to fix it, thanks for reminder.
Thanks,
Anson