From: Joakim Zhang <[email protected]>
Add JSON metrics for imx8mm DDR Perf.
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: John Garry <[email protected]>
---
.../arch/arm64/freescale/imx8mm/sys/ddrc.json | 39 +++++++++++++++++++
.../arm64/freescale/imx8mm/sys/metrics.json | 18 +++++++++
tools/perf/pmu-events/jevents.c | 1 +
3 files changed, 58 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
new file mode 100644
index 000000000000..3404a880542d
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
@@ -0,0 +1,39 @@
+[
+ {
+ "BriefDescription": "ddr cycles event",
+ "EventCode": "0x00",
+ "EventName": "imx8_ddr.cycles",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ },
+ {
+ "BriefDescription": "ddr read-cycles event",
+ "EventCode": "0x2a",
+ "EventName": "imx8_ddr.read_cycles",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ },
+ {
+ "BriefDescription": "ddr write-cycles event",
+ "EventCode": "0x2b",
+ "EventName": "imx8_ddr.write_cycles",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ },
+ {
+ "BriefDescription": "ddr read event",
+ "EventCode": "0x35",
+ "EventName": "imx8_ddr.read",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ },
+ {
+ "BriefDescription": "ddr write event",
+ "EventCode": "0x38",
+ "EventName": "imx8_ddr.write",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ }
+]
+
+
diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
new file mode 100644
index 000000000000..ec00212336de
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
@@ -0,0 +1,18 @@
+[
+ {
+ "BriefDescription": "bytes all masters read from ddr based on read-cycles event",
+ "MetricName": "imx8mm_ddr_read.all",
+ "MetricExpr": "imx8_ddr.read_cycles * 4 * 4",
+ "ScaleUnit": "9.765625e-KB",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ },
+ {
+ "BriefDescription": "bytes all masters write to ddr based on write-cycles event",
+ "MetricName": "imx8mm_ddr_write.all",
+ "MetricExpr": "imx8_ddr.write_cycles * 4 * 4",
+ "ScaleUnit": "9.765625e-4KB",
+ "Unit": "imx8_ddr",
+ "Compat": "i.MX8MM"
+ }
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index 2e581bd9b0a6..b4bd48b076fd 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -257,6 +257,7 @@ static struct map {
{ "hisi_sccl,hha", "hisi_sccl,hha" },
{ "hisi_sccl,l3c", "hisi_sccl,l3c" },
/* it's not realistic to keep adding these, we need something more scalable ... */
+ { "imx8_ddr", "imx8_ddr" },
{ "smmuv3_pmcg", "smmuv3_pmcg" },
{ "L3PMC", "amd_l3" },
{}
--
2.26.2
> -----Original Message-----
> From: John Garry <[email protected]>
> Sent: 2020??10??8?? 18:15
> To: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]
> Cc: [email protected]; [email protected];
> [email protected]; Joakim Zhang
> <[email protected]>; [email protected];
> [email protected]; dl-linux-imx <[email protected]>; John Garry
> <[email protected]>
> Subject: [PATCH RFC v4 13/13] perf vendor events: Add JSON metrics for
> imx8mm DDR Perf
>
> From: Joakim Zhang <[email protected]>
>
> Add JSON metrics for imx8mm DDR Perf.
>
> Signed-off-by: Joakim Zhang <[email protected]>
> Signed-off-by: John Garry <[email protected]>
> ---
> .../arch/arm64/freescale/imx8mm/sys/ddrc.json | 39 +++++++++++++++++++
> .../arm64/freescale/imx8mm/sys/metrics.json | 18 +++++++++
> tools/perf/pmu-events/jevents.c | 1 +
> 3 files changed, 58 insertions(+)
> create mode 100644
> tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> create mode 100644
> tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
>
> diff --git
> a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> new file mode 100644
> index 000000000000..3404a880542d
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> @@ -0,0 +1,39 @@
> +[
> + {
> + "BriefDescription": "ddr cycles event",
> + "EventCode": "0x00",
> + "EventName": "imx8_ddr.cycles",
Could you help change to imx8mm_ddr.cycles? Thanks a lot!
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + },
> + {
> + "BriefDescription": "ddr read-cycles event",
> + "EventCode": "0x2a",
> + "EventName": "imx8_ddr.read_cycles",
Same here.
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + },
> + {
> + "BriefDescription": "ddr write-cycles event",
> + "EventCode": "0x2b",
> + "EventName": "imx8_ddr.write_cycles",
Same here.
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + },
> + {
> + "BriefDescription": "ddr read event",
> + "EventCode": "0x35",
> + "EventName": "imx8_ddr.read",
Same here.
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + },
> + {
> + "BriefDescription": "ddr write event",
> + "EventCode": "0x38",
> + "EventName": "imx8_ddr.write",
Same here.
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + }
> +]
> +
> +
> diff --git
> a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> new file mode 100644
> index 000000000000..ec00212336de
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> @@ -0,0 +1,18 @@
> +[
> + {
> + "BriefDescription": "bytes all masters read from ddr based on
> read-cycles event",
> + "MetricName": "imx8mm_ddr_read.all",
> + "MetricExpr": "imx8_ddr.read_cycles * 4 * 4",
> + "ScaleUnit": "9.765625e-KB",
A typo, should be "ScaleUnit": "9.765625e-4KB".
Best Regards,
Joakim Zhang
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + },
> + {
> + "BriefDescription": "bytes all masters write to ddr based on
> write-cycles event",
> + "MetricName": "imx8mm_ddr_write.all",
> + "MetricExpr": "imx8_ddr.write_cycles * 4 * 4",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx8_ddr",
> + "Compat": "i.MX8MM"
> + }
> +]
> diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
> index 2e581bd9b0a6..b4bd48b076fd 100644
> --- a/tools/perf/pmu-events/jevents.c
> +++ b/tools/perf/pmu-events/jevents.c
> @@ -257,6 +257,7 @@ static struct map {
> { "hisi_sccl,hha", "hisi_sccl,hha" },
> { "hisi_sccl,l3c", "hisi_sccl,l3c" },
> /* it's not realistic to keep adding these, we need something more
> scalable ... */
> + { "imx8_ddr", "imx8_ddr" },
> { "smmuv3_pmcg", "smmuv3_pmcg" },
> { "L3PMC", "amd_l3" },
> {}
> --
> 2.26.2
On 12/10/2020 11:03, Joakim Zhang wrote:
>> --- /dev/null
>> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
>> @@ -0,0 +1,39 @@
>> +[
>> + {
>> + "BriefDescription": "ddr cycles event",
>> + "EventCode": "0x00",
>> + "EventName": "imx8_ddr.cycles",
> Could you help change to imx8mm_ddr.cycles? Thanks a lot!
Can do.
Note that I want to improve perf list in future such that alias
"imx8_ddr.cycles" removes kernel PMU events which this alias is
matching. The motivation is that perf list can be swamped by kernel
uncore PMU events listing.
>
>> + "Unit": "imx8_ddr",
>> + "Compat": "i.MX8MM"