This patch intends to implement intmux PM.
ChangeLogs:
V1->V2:
1. add more detailed commit message.
2. use u32 for 32bit HW registers.
3. fix kbuild failures.
4. move trivial functions into their respective callers.
5. squash two patches together.
Joakim Zhang (1):
irqchip: imx-intmux: implement intmux PM
drivers/irqchip/irq-imx-intmux.c | 70 +++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 2 deletions(-)
--
2.17.1
When system suspended, we could explicitly disable clock to save power.
And we need save registers' state since it could be lost after power
off.
Implement PM which will:
1) Without CONFIG_PM, clock is always on after probe stage.
2) With CONFIG_PM, clock is off after probe stage.
3) Disable clock and save registers' state when do system suspend and
enable clock and restore registers' state while system resume.
4) Make Power Domain framework be able to shutdown the corresponding
power domain of this device.
Signed-off-by: Joakim Zhang <[email protected]>
---
drivers/irqchip/irq-imx-intmux.c | 70 +++++++++++++++++++++++++++++++-
1 file changed, 68 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-imx-intmux.c b/drivers/irqchip/irq-imx-intmux.c
index c27577c81126..5971603cc607 100644
--- a/drivers/irqchip/irq-imx-intmux.c
+++ b/drivers/irqchip/irq-imx-intmux.c
@@ -53,6 +53,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/spinlock.h>
+#include <linux/pm_runtime.h>
#define CHANIER(n) (0x10 + (0x40 * n))
#define CHANIPR(n) (0x20 + (0x40 * n))
@@ -60,6 +61,7 @@
#define CHAN_MAX_NUM 0x8
struct intmux_irqchip_data {
+ struct irq_chip chip;
int chanidx;
int irq;
struct irq_domain *domain;
@@ -70,6 +72,7 @@ struct intmux_data {
void __iomem *regs;
struct clk *ipg_clk;
int channum;
+ u32 *saved_reg;
struct intmux_irqchip_data irqchip_data[];
};
@@ -120,8 +123,10 @@ static struct irq_chip imx_intmux_irq_chip = {
static int imx_intmux_irq_map(struct irq_domain *h, unsigned int irq,
irq_hw_number_t hwirq)
{
- irq_set_chip_data(irq, h->host_data);
- irq_set_chip_and_handler(irq, &imx_intmux_irq_chip, handle_level_irq);
+ struct intmux_irqchip_data *data = h->host_data;
+
+ irq_set_chip_data(irq, data);
+ irq_set_chip_and_handler(irq, &data->chip, handle_level_irq);
return 0;
}
@@ -232,6 +237,19 @@ static int imx_intmux_probe(struct platform_device *pdev)
data->channum = channum;
raw_spin_lock_init(&data->lock);
+ if (IS_ENABLED(CONFIG_PM)) {
+ /* save CHANIER register */
+ data->saved_reg = devm_kzalloc(&pdev->dev,
+ sizeof(unsigned int) * channum,
+ GFP_KERNEL);
+ if (!data->saved_reg)
+ return -ENOMEM;
+ }
+
+ pm_runtime_get_noresume(&pdev->dev);
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+
ret = clk_prepare_enable(data->ipg_clk);
if (ret) {
dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
@@ -239,6 +257,8 @@ static int imx_intmux_probe(struct platform_device *pdev)
}
for (i = 0; i < channum; i++) {
+ data->irqchip_data[i].chip = imx_intmux_irq_chip;
+ data->irqchip_data[i].chip.parent_device = &pdev->dev;
data->irqchip_data[i].chanidx = i;
data->irqchip_data[i].irq = irq_of_parse_and_map(np, i);
@@ -267,6 +287,12 @@ static int imx_intmux_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, data);
+ /*
+ * Let pm_runtime_put() disable clock.
+ * If CONFIG_PM is not enabled, the clock will stay powered.
+ */
+ pm_runtime_put(&pdev->dev);
+
return 0;
out:
clk_disable_unprepare(data->ipg_clk);
@@ -288,11 +314,50 @@ static int imx_intmux_remove(struct platform_device *pdev)
irq_domain_remove(data->irqchip_data[i].domain);
}
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int imx_intmux_runtime_suspend(struct device *dev)
+{
+ struct intmux_data *data = dev_get_drvdata(dev);
+ int i;
+
+ for (i = 0; i < data->channum; i++)
+ data->saved_reg[i] = readl_relaxed(data->regs + CHANIER(i));
+
clk_disable_unprepare(data->ipg_clk);
return 0;
}
+static int imx_intmux_runtime_resume(struct device *dev)
+{
+ struct intmux_data *data = dev_get_drvdata(dev);
+ int ret, i;
+
+ ret = clk_prepare_enable(data->ipg_clk);
+ if (ret) {
+ dev_err(dev, "failed to enable ipg clk: %d\n", ret);
+ return ret;
+ }
+
+ for (i = 0; i < data->channum; i++)
+ writel_relaxed(data->saved_reg[i], data->regs + CHANIER(i));
+
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops imx_intmux_pm_ops = {
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+ SET_RUNTIME_PM_OPS(imx_intmux_runtime_suspend,
+ imx_intmux_runtime_resume, NULL)
+};
+
static const struct of_device_id imx_intmux_id[] = {
{ .compatible = "fsl,imx-intmux", },
{ /* sentinel */ },
@@ -302,6 +367,7 @@ static struct platform_driver imx_intmux_driver = {
.driver = {
.name = "imx-intmux",
.of_match_table = imx_intmux_id,
+ .pm = &imx_intmux_pm_ops,
},
.probe = imx_intmux_probe,
.remove = imx_intmux_remove,
--
2.17.1
On Mon, 20 Jul 2020 11:42:37 +0100,
Joakim Zhang <[email protected]> wrote:
>
> When system suspended, we could explicitly disable clock to save power.
> And we need save registers' state since it could be lost after power
> off.
>
> Implement PM which will:
> 1) Without CONFIG_PM, clock is always on after probe stage.
> 2) With CONFIG_PM, clock is off after probe stage.
> 3) Disable clock and save registers' state when do system suspend and
> enable clock and restore registers' state while system resume.
> 4) Make Power Domain framework be able to shutdown the corresponding
> power domain of this device.
>
> Signed-off-by: Joakim Zhang <[email protected]>
> ---
> drivers/irqchip/irq-imx-intmux.c | 70 +++++++++++++++++++++++++++++++-
> 1 file changed, 68 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-imx-intmux.c b/drivers/irqchip/irq-imx-intmux.c
> index c27577c81126..5971603cc607 100644
> --- a/drivers/irqchip/irq-imx-intmux.c
> +++ b/drivers/irqchip/irq-imx-intmux.c
> @@ -53,6 +53,7 @@
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> #include <linux/spinlock.h>
> +#include <linux/pm_runtime.h>
>
> #define CHANIER(n) (0x10 + (0x40 * n))
> #define CHANIPR(n) (0x20 + (0x40 * n))
> @@ -60,6 +61,7 @@
> #define CHAN_MAX_NUM 0x8
>
> struct intmux_irqchip_data {
> + struct irq_chip chip;
> int chanidx;
> int irq;
> struct irq_domain *domain;
> @@ -70,6 +72,7 @@ struct intmux_data {
> void __iomem *regs;
> struct clk *ipg_clk;
> int channum;
> + u32 *saved_reg;
> struct intmux_irqchip_data irqchip_data[];
> };
>
> @@ -120,8 +123,10 @@ static struct irq_chip imx_intmux_irq_chip = {
> static int imx_intmux_irq_map(struct irq_domain *h, unsigned int irq,
> irq_hw_number_t hwirq)
> {
> - irq_set_chip_data(irq, h->host_data);
> - irq_set_chip_and_handler(irq, &imx_intmux_irq_chip, handle_level_irq);
> + struct intmux_irqchip_data *data = h->host_data;
> +
> + irq_set_chip_data(irq, data);
> + irq_set_chip_and_handler(irq, &data->chip, handle_level_irq);
>
> return 0;
> }
> @@ -232,6 +237,19 @@ static int imx_intmux_probe(struct platform_device *pdev)
> data->channum = channum;
> raw_spin_lock_init(&data->lock);
>
> + if (IS_ENABLED(CONFIG_PM)) {
> + /* save CHANIER register */
> + data->saved_reg = devm_kzalloc(&pdev->dev,
> + sizeof(unsigned int) * channum,
This isn't consistent with the type of data->saved_reg. Consider using
sizeof(*data->saved_reg), which is guaranteed to be the right type.
It also begs the question: since this saved_reg array is allocated on
a per channel basis, why don't you have a per-channel additional u32
in the intmux_irqchip_data structure instead? This would sidestep this
extra allocation altogether.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
> -----Original Message-----
> From: Marc Zyngier <[email protected]>
> Sent: 2020??7??25?? 21:05
> To: Joakim Zhang <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> dl-linux-imx <[email protected]>; [email protected]
> Subject: Re: [PATCH V2 1/1] irqchip: imx-intmux: implement intmux PM
>
> On Mon, 20 Jul 2020 11:42:37 +0100,
> Joakim Zhang <[email protected]> wrote:
> >
> > When system suspended, we could explicitly disable clock to save power.
> > And we need save registers' state since it could be lost after power
> > off.
> >
> > Implement PM which will:
> > 1) Without CONFIG_PM, clock is always on after probe stage.
> > 2) With CONFIG_PM, clock is off after probe stage.
> > 3) Disable clock and save registers' state when do system suspend and
> > enable clock and restore registers' state while system resume.
> > 4) Make Power Domain framework be able to shutdown the corresponding
> > power domain of this device.
> >
> > Signed-off-by: Joakim Zhang <[email protected]>
> > ---
> > drivers/irqchip/irq-imx-intmux.c | 70
> > +++++++++++++++++++++++++++++++-
> > 1 file changed, 68 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-imx-intmux.c
> > b/drivers/irqchip/irq-imx-intmux.c
> > index c27577c81126..5971603cc607 100644
> > --- a/drivers/irqchip/irq-imx-intmux.c
> > +++ b/drivers/irqchip/irq-imx-intmux.c
> > @@ -53,6 +53,7 @@
> > #include <linux/of_irq.h>
> > #include <linux/of_platform.h>
> > #include <linux/spinlock.h>
> > +#include <linux/pm_runtime.h>
> >
> > #define CHANIER(n) (0x10 + (0x40 * n))
> > #define CHANIPR(n) (0x20 + (0x40 * n))
> > @@ -60,6 +61,7 @@
> > #define CHAN_MAX_NUM 0x8
> >
> > struct intmux_irqchip_data {
> > + struct irq_chip chip;
> > int chanidx;
> > int irq;
> > struct irq_domain *domain;
> > @@ -70,6 +72,7 @@ struct intmux_data {
> > void __iomem *regs;
> > struct clk *ipg_clk;
> > int channum;
> > + u32 *saved_reg;
> > struct intmux_irqchip_data irqchip_data[];
> > };
> >
> > @@ -120,8 +123,10 @@ static struct irq_chip imx_intmux_irq_chip = {
> > static int imx_intmux_irq_map(struct irq_domain *h, unsigned int irq,
> > irq_hw_number_t hwirq)
> > {
> > - irq_set_chip_data(irq, h->host_data);
> > - irq_set_chip_and_handler(irq, &imx_intmux_irq_chip, handle_level_irq);
> > + struct intmux_irqchip_data *data = h->host_data;
> > +
> > + irq_set_chip_data(irq, data);
> > + irq_set_chip_and_handler(irq, &data->chip, handle_level_irq);
> >
> > return 0;
> > }
> > @@ -232,6 +237,19 @@ static int imx_intmux_probe(struct platform_device
> *pdev)
> > data->channum = channum;
> > raw_spin_lock_init(&data->lock);
> >
> > + if (IS_ENABLED(CONFIG_PM)) {
> > + /* save CHANIER register */
> > + data->saved_reg = devm_kzalloc(&pdev->dev,
> > + sizeof(unsigned int) * channum,
>
> This isn't consistent with the type of data->saved_reg. Consider using
> sizeof(*data->saved_reg), which is guaranteed to be the right type.
Sorry for my mistake, I forgot to modify this unit.
> It also begs the question: since this saved_reg array is allocated on a per
> channel basis, why don't you have a per-channel additional u32 in the
> intmux_irqchip_data structure instead? This would sidestep this extra
> allocation altogether.
Yes, this make sense. Thanks.
Best Regards,
Joakim Zhang
> Thanks,
>
> M.
>
> --
> Without deviation from the norm, progress is not possible.