2020-09-07 05:47:45

by Zhiqiang Hou

Subject: [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes

From: Hou Zhiqiang <[email protected]>

The LS1043A PCIe controller has some control registers
in SCFG block, so add the SCFG phandle for each PCIe
controller DT node.

Signed-off-by: Hou Zhiqiang <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 70e07612da12..30ccf1fdb851 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -822,6 +822,7 @@
interrupts = <0 118 0x4>, /* controller interrupt */
<0 117 0x4>; /* PME interrupt */
interrupt-names = "intr", "pme";
+ fsl,pcie-scfg = <&scfg 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -849,6 +850,7 @@
interrupts = <0 128 0x4>,
<0 127 0x4>;
interrupt-names = "intr", "pme";
+ fsl,pcie-scfg = <&scfg 1>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -876,6 +878,7 @@
interrupts = <0 162 0x4>,
<0 161 0x4>;
interrupt-names = "intr", "pme";
+ fsl,pcie-scfg = <&scfg 2>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
--
2.17.1

2020-09-21 13:18:14

by Shawn Guo

Subject: Re: [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes

On Mon, Sep 07, 2020 at 01:38:00PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <[email protected]>
>
> The LS1043A PCIe controller has some control registers
> in SCFG block, so add the SCFG phandle for each PCIe
> controller DT node.
>
> Signed-off-by: Hou Zhiqiang <[email protected]>

'arm64: dts: ...' for subject prefix.

Shawn

2020-09-21 16:48:15

by Zhiqiang Hou

Subject: RE: [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes

Hi Shawn,

Thanks a lot for your comments!

> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: 2020??9??21?? 21:17
> To: Z.q. Hou <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Leo Li <[email protected]>; [email protected];
> [email protected]; M.h. Lian <[email protected]>;
> Mingkai Hu <[email protected]>; Roy Zang <[email protected]>
> Subject: Re: [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe
> nodes
>
> On Mon, Sep 07, 2020 at 01:38:00PM +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <[email protected]>
> >
> > The LS1043A PCIe controller has some control registers in SCFG block,
> > so add the SCFG phandle for each PCIe controller DT node.
> >
> > Signed-off-by: Hou Zhiqiang <[email protected]>
>
> 'arm64: dts: ...' for subject prefix.

Will correct it in next version.

Regards,
Zhiqiang

>
> Shawn