From: Robin Gong <[email protected]>
There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
transfer to be send twice in DMA mode. Please get more information from:
https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
new sdma ram script which works in XCH mode as PIO inside sdma instead
of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be
exist on all legacy i.mx6/7 soc family before i.mx6ul.
NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/
6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips
still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata
or not.
The first two reverted patches should be the same issue, though, it
seems 'fixed' by changing to other shp script. Hope Sean or Sascha could
have the chance to test this patch set if could fix their issues.
Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
on i.mx8mm because the event id is zero.
PS:
Please get sdma firmware from below linux-firmware and copy it to your
local rootfs /lib/firmware/imx/sdma.
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma
v2:
1.Add commit log for reverted patches.
2.Add comment for 'ecspi_fixed' in sdma driver.
3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
rather than remove.
v3:
1.Confirm with design team make sure ERR009165 fixed on i.mx6ul/i.mx6ull
/i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy chips.
Correct dts related dts patch in v2.
2.Clean eratta information in binding doc and new 'tx_glitch_fixed' flag
in spi-imx driver to state ERR009165 fixed or not.
3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in the
errata workaroud, thus improve performance as possible.
v4:
1.add Ack tag from Mark and Vinod
2. remove checking 'event_id1' zero as 'event_id0'.
v5:
1.Add another patch for compatible with the current uart driver which
using rom script, so both uart ram script and rom script supported
in latest firmware, by default uart rom script used. UART driver
will be broken without this patch. Latest sdma firmware has been
already updated in linux-firmware.
Robin Gong (15):
Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
Revert "dmaengine: imx-sdma: refine to load context only once"
dmaengine: imx-sdma: remove dupilicated sdma_load_context
dmaengine: imx-sdma: add mcu_2_ecspi script
spi: imx: fix ERR009165
spi: imx: remove ERR009165 workaround on i.mx6ul
spi: imx: add new i.mx6ul compatible name in binding doc
dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
dma: imx-sdma: add i.mx6ul/6sx compatible name
dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
ARM: dts: imx6ul: add dma support on ecspi
ARM: dts: imx6sll: correct sdma compatible
arm64: defconfig: Enable SDMA on i.mx8mq/8mm
dmaengine: imx-sdma: add uart rom script
.../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +
.../devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
arch/arm/boot/dts/imx6q.dtsi | 2 +-
arch/arm/boot/dts/imx6qdl.dtsi | 8 +-
arch/arm/boot/dts/imx6sll.dtsi | 2 +-
arch/arm/boot/dts/imx6ul.dtsi | 8 ++
arch/arm64/configs/defconfig | 3 +
drivers/dma/imx-sdma.c | 88 ++++++++++++++++------
drivers/spi/spi-imx.c | 61 ++++++++++++---
include/linux/platform_data/dma-imx-sdma.h | 11 ++-
10 files changed, 145 insertions(+), 41 deletions(-)
--
2.7.4
From: Robin Gong <[email protected]>
ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and
i.mx8m/8mm still need this errata. Please refer to nxp official
errata document from https://www.nxp.com/ .
For removing workaround on those chips. Add new i.mx6ul type.
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Mark Brown <[email protected]>
---
drivers/spi/spi-imx.c | 50 +++++++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 45 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 6795910..91660dc 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -57,6 +57,7 @@ enum spi_imx_devtype {
IMX35_CSPI, /* CSPI on all i.mx except above */
IMX51_ECSPI, /* ECSPI on i.mx51 */
IMX53_ECSPI, /* ECSPI on i.mx53 and later */
+ IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */
};
struct spi_imx_data;
@@ -75,6 +76,11 @@ struct spi_imx_devtype_data {
bool has_slavemode;
unsigned int fifo_size;
bool dynamic_burst;
+ /*
+ * ERR009165 fixed or not:
+ * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
+ */
+ bool tx_glitch_fixed;
enum spi_imx_devtype devtype;
};
@@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d)
static inline int is_imx51_ecspi(struct spi_imx_data *d)
{
- return d->devtype_data->devtype == IMX51_ECSPI;
+ return d->devtype_data->devtype == IMX51_ECSPI ||
+ d->devtype_data->devtype == IMX6UL_ECSPI;
}
static inline int is_imx53_ecspi(struct spi_imx_data *d)
@@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
spi_imx->spi_bus_clk = clk;
- /* ERR009165: work in XHC mode as PIO */
- if (spi_imx->usedma)
- ctrl &= ~MX51_ECSPI_CTRL_SMC;
+ /*
+ * ERR009165: work in XHC mode instead of SMC as PIO on the chips
+ * before i.mx6ul.
+ */
+ if (spi_imx->usedma) {
+ if (spi_imx->devtype_data->tx_glitch_fixed)
+ ctrl |= MX51_ECSPI_CTRL_SMC;
+ else
+ ctrl &= ~MX51_ECSPI_CTRL_SMC;
+ }
writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
@@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx)
{
u32 tx_wml = 0;
+ if (spi_imx->devtype_data->tx_glitch_fixed)
+ tx_wml = spi_imx->wml;
/*
* Configure the DMA register: setup the watermark
* and enable DMA request.
@@ -1012,6 +1028,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = {
.devtype = IMX53_ECSPI,
};
+static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = {
+ .intctrl = mx51_ecspi_intctrl,
+ .prepare_message = mx51_ecspi_prepare_message,
+ .prepare_transfer = mx51_ecspi_prepare_transfer,
+ .trigger = mx51_ecspi_trigger,
+ .rx_available = mx51_ecspi_rx_available,
+ .reset = mx51_ecspi_reset,
+ .setup_wml = mx51_setup_wml,
+ .fifo_size = 64,
+ .has_dmamode = true,
+ .dynamic_burst = true,
+ .has_slavemode = true,
+ .tx_glitch_fixed = true,
+ .disable = mx51_ecspi_disable,
+ .devtype = IMX6UL_ECSPI,
+};
+
static const struct platform_device_id spi_imx_devtype[] = {
{
.name = "imx1-cspi",
@@ -1035,6 +1068,9 @@ static const struct platform_device_id spi_imx_devtype[] = {
.name = "imx53-ecspi",
.driver_data = (kernel_ulong_t) &imx53_ecspi_devtype_data,
}, {
+ .name = "imx6ul-ecspi",
+ .driver_data = (kernel_ulong_t) &imx6ul_ecspi_devtype_data,
+ }, {
/* sentinel */
}
};
@@ -1047,6 +1083,7 @@ static const struct of_device_id spi_imx_dt_ids[] = {
{ .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
{ .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
{ .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, },
+ { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, spi_imx_dt_ids);
@@ -1178,7 +1215,10 @@ static int spi_imx_dma_configure(struct spi_master *master)
* For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size
* to speed up fifo filling as possible.
*/
- tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
+ if (spi_imx->devtype_data->tx_glitch_fixed)
+ tx.dst_maxburst = spi_imx->wml;
+ else
+ tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
ret = dmaengine_slave_config(master->dma_tx, &tx);
if (ret) {
dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);
--
2.7.4
From: Robin Gong <[email protected]>
ECSPI issue fixed from i.mx6ul at hardware level, no need
ERR009165 anymore on those chips such as i.mx8mq. Add i.mx6sx
from where i.mx6ul source.
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Vinod Koul <[email protected]>
---
drivers/dma/imx-sdma.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 61af656..525ca89 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -419,6 +419,13 @@ struct sdma_driver_data {
int num_events;
struct sdma_script_start_addrs *script_addrs;
bool check_ratio;
+ /*
+ * ecspi ERR009165 fixed should be done in sdma script
+ * and it has been fixed in soc from i.mx6ul.
+ * please get more information from the below link:
+ * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
+ */
+ bool ecspi_fixed;
};
struct sdma_engine {
@@ -539,6 +546,31 @@ static struct sdma_driver_data sdma_imx6q = {
.script_addrs = &sdma_script_imx6q,
};
+static struct sdma_script_start_addrs sdma_script_imx6sx = {
+ .ap_2_ap_addr = 642,
+ .uart_2_mcu_addr = 817,
+ .mcu_2_app_addr = 747,
+ .uartsh_2_mcu_addr = 1032,
+ .mcu_2_shp_addr = 960,
+ .app_2_mcu_addr = 683,
+ .shp_2_mcu_addr = 891,
+ .spdif_2_mcu_addr = 1100,
+ .mcu_2_spdif_addr = 1134,
+};
+
+static struct sdma_driver_data sdma_imx6sx = {
+ .chnenbl0 = SDMA_CHNENBL0_IMX35,
+ .num_events = 48,
+ .script_addrs = &sdma_script_imx6sx,
+};
+
+static struct sdma_driver_data sdma_imx6ul = {
+ .chnenbl0 = SDMA_CHNENBL0_IMX35,
+ .num_events = 48,
+ .script_addrs = &sdma_script_imx6sx,
+ .ecspi_fixed = true,
+};
+
static struct sdma_script_start_addrs sdma_script_imx7d = {
.ap_2_ap_addr = 644,
.uart_2_mcu_addr = 819,
@@ -584,9 +616,15 @@ static const struct platform_device_id sdma_devtypes[] = {
.name = "imx6q-sdma",
.driver_data = (unsigned long)&sdma_imx6q,
}, {
+ .name = "imx6sx-sdma",
+ .driver_data = (unsigned long)&sdma_imx6sx,
+ }, {
.name = "imx7d-sdma",
.driver_data = (unsigned long)&sdma_imx7d,
}, {
+ .name = "imx6ul-sdma",
+ .driver_data = (unsigned long)&sdma_imx6ul,
+ }, {
.name = "imx8mq-sdma",
.driver_data = (unsigned long)&sdma_imx8mq,
}, {
@@ -602,7 +640,9 @@ static const struct of_device_id sdma_dt_ids[] = {
{ .compatible = "fsl,imx35-sdma", .data = &sdma_imx35, },
{ .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
{ .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
+ { .compatible = "fsl,imx6sx-sdma", .data = &sdma_imx6sx, },
{ .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
+ { .compatible = "fsl,imx6ul-sdma", .data = &sdma_imx6ul, },
{ .compatible = "fsl,imx8mq-sdma", .data = &sdma_imx8mq, },
{ /* sentinel */ }
};
@@ -1166,8 +1206,17 @@ static int sdma_config_channel(struct dma_chan *chan)
if (sdmac->peripheral_type == IMX_DMATYPE_ASRC_SP ||
sdmac->peripheral_type == IMX_DMATYPE_ASRC)
sdma_set_watermarklevel_for_p2p(sdmac);
- } else
+ } else {
+ /*
+ * ERR009165 fixed from i.mx6ul, no errata need,
+ * set bit31 to let sdma script skip the errata.
+ */
+ if (sdmac->peripheral_type == IMX_DMATYPE_CSPI &&
+ sdmac->direction == DMA_MEM_TO_DEV &&
+ sdmac->sdma->drvdata->ecspi_fixed)
+ __set_bit(31, &sdmac->watermark_level);
__set_bit(sdmac->event_id0, sdmac->event_mask);
+ }
/* Address */
sdmac->shp_addr = sdmac->per_address;
--
2.7.4
From: Robin Gong <[email protected]>
Add dma support on ecspi.
Signed-off-by: Robin Gong <[email protected]>
---
arch/arm/boot/dts/imx6ul.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index fc388b8..4a34316 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -227,6 +227,8 @@
clocks = <&clks IMX6UL_CLK_ECSPI1>,
<&clks IMX6UL_CLK_ECSPI1>;
clock-names = "ipg", "per";
+ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -239,6 +241,8 @@
clocks = <&clks IMX6UL_CLK_ECSPI2>,
<&clks IMX6UL_CLK_ECSPI2>;
clock-names = "ipg", "per";
+ dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -251,6 +255,8 @@
clocks = <&clks IMX6UL_CLK_ECSPI3>,
<&clks IMX6UL_CLK_ECSPI3>;
clock-names = "ipg", "per";
+ dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -263,6 +269,8 @@
clocks = <&clks IMX6UL_CLK_ECSPI4>,
<&clks IMX6UL_CLK_ECSPI4>;
clock-names = "ipg", "per";
+ dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
--
2.7.4
From: Robin Gong <[email protected]>
Correct sdma compatible since ecspi errata ERR009165 has been fixed
on i.mx6sll as i.mx6ul.
Signed-off-by: Robin Gong <[email protected]>
---
arch/arm/boot/dts/imx6sll.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 1b4899f..d810e10 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -619,7 +619,7 @@
};
sdma: dma-controller@20ec000 {
- compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
+ compatible = "fsl,imx6sll-sdma", "fsl,imx6ul-sdma";
reg = <0x020ec000 0x4000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_IPG>,
--
2.7.4
From: Robin Gong <[email protected]>
Enable SDMA support on i.mx8mq/8mm chips, including enabling
CONFIG_FW_LOADER_USER_HELPER/CONFIG_FW_LOADER_USER_HELPER_FALLBACK
for firmware loaded by udev.
Signed-off-by: Robin Gong <[email protected]>
---
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index bb0705e..e8aabc52 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -195,6 +195,8 @@ CONFIG_PCIE_HISI_STB=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_HISILICON_LPC=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_MTD=y
@@ -627,6 +629,7 @@ CONFIG_RTC_DRV_XGENE=y
CONFIG_DMADEVICES=y
CONFIG_FSL_EDMA=y
CONFIG_DMA_BCM2835=m
+CONFIG_IMX_SDMA=y
CONFIG_K3_DMA=y
CONFIG_MV_XOR=y
CONFIG_MV_XOR_V2=y
--
2.7.4
From: Robin Gong <[email protected]>
For the compatibility of NXP internal legacy kernel before 4.19 which
is based on uart ram script and upstreaming kernel based on uart rom
script, add both uart ram/rom script in latest sdma firmware. By default
uart rom script used.
Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and add
back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for i.mx6).
rom script:
uart_2_mcu_addr
uartsh_2_mcu_addr /* through spba bus */
ram script:
uart_2_mcu_ram_addr
uartsh_2_mcu_ram_addr /* through spba bus */
Please get latest sdma firmware from the below and put them into the path
(/lib/firmware/imx/sdma/):
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
/tree/imx/sdma
Signed-off-by: Robin Gong <[email protected]>
---
drivers/dma/imx-sdma.c | 4 ++--
include/linux/platform_data/dma-imx-sdma.h | 10 ++++++++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index f7c150d..deea9aa 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -1733,8 +1733,8 @@ static void sdma_issue_pending(struct dma_chan *chan)
#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34
#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38
-#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41
-#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42
+#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45
+#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46
static void sdma_add_scripts(struct sdma_engine *sdma,
const struct sdma_script_start_addrs *addr)
diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h
index f794fee..e12d2e8 100644
--- a/include/linux/platform_data/dma-imx-sdma.h
+++ b/include/linux/platform_data/dma-imx-sdma.h
@@ -20,12 +20,12 @@ struct sdma_script_start_addrs {
s32 per_2_firi_addr;
s32 mcu_2_firi_addr;
s32 uart_2_per_addr;
- s32 uart_2_mcu_addr;
+ s32 uart_2_mcu_ram_addr;
s32 per_2_app_addr;
s32 mcu_2_app_addr;
s32 per_2_per_addr;
s32 uartsh_2_per_addr;
- s32 uartsh_2_mcu_addr;
+ s32 uartsh_2_mcu_ram_addr;
s32 per_2_shp_addr;
s32 mcu_2_shp_addr;
s32 ata_2_mcu_addr;
@@ -52,7 +52,13 @@ struct sdma_script_start_addrs {
s32 zcanfd_2_mcu_addr;
s32 zqspi_2_mcu_addr;
s32 mcu_2_ecspi_addr;
+ s32 mcu_2_sai_addr;
+ s32 sai_2_mcu_addr;
+ s32 uart_2_mcu_addr;
+ s32 uartsh_2_mcu_addr;
/* End of v3 array */
+ s32 mcu_2_zqspi_addr;
+ /* End of v4 array */
};
/**
--
2.7.4
From: Robin Gong <[email protected]>
Add i.mx6ul and i.mx6sx compatible name in binding doc.
Signed-off-by: Robin Gong <[email protected]>
---
Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 9d8bbac..d024a83 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -9,6 +9,8 @@ Required properties:
"fsl,imx53-sdma"
"fsl,imx6q-sdma"
"fsl,imx7d-sdma"
+ "fsl,imx6sx-sdma"
+ "fsl,imx6ul-sdma"
"fsl,imx8mq-sdma"
The -to variants should be preferred since they allow to determine the
correct ROM script addresses needed for the driver to work without additional
--
2.7.4
From: Robin Gong <[email protected]>
ERR009165 fixed from i.mx6ul, add its compatible name in binding
doc.
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Mark Brown <[email protected]>
---
Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
index 2d32641..b3d02a3 100644
--- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
+++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
@@ -10,6 +10,7 @@ Required properties:
- "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
- "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
- "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
+ - "fsl,imx6ul-ecspi" for SPI compatible with the one integrated on i.MX6UL and later Soc
- "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M
- reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt
--
2.7.4
From: Robin Gong <[email protected]>
Change to XCH mode even in dma mode, please refer to the below
errata:
https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Mark Brown <[email protected]>
---
drivers/spi/spi-imx.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 09c9a1e..6795910 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -585,8 +585,9 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
spi_imx->spi_bus_clk = clk;
+ /* ERR009165: work in XHC mode as PIO */
if (spi_imx->usedma)
- ctrl |= MX51_ECSPI_CTRL_SMC;
+ ctrl &= ~MX51_ECSPI_CTRL_SMC;
writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
@@ -612,12 +613,14 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
static void mx51_setup_wml(struct spi_imx_data *spi_imx)
{
+ u32 tx_wml = 0;
+
/*
* Configure the DMA register: setup the watermark
* and enable DMA request.
*/
writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml - 1) |
- MX51_ECSPI_DMA_TX_WML(spi_imx->wml) |
+ MX51_ECSPI_DMA_TX_WML(tx_wml) |
MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) |
MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN |
MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA);
@@ -1171,7 +1174,11 @@ static int spi_imx_dma_configure(struct spi_master *master)
tx.direction = DMA_MEM_TO_DEV;
tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA;
tx.dst_addr_width = buswidth;
- tx.dst_maxburst = spi_imx->wml;
+ /*
+ * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size
+ * to speed up fifo filling as possible.
+ */
+ tx.dst_maxburst = spi_imx->devtype_data->fifo_size;
ret = dmaengine_slave_config(master->dma_tx, &tx);
if (ret) {
dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);
@@ -1265,10 +1272,6 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
{
int ret;
- /* use pio mode for i.mx6dl chip TKT238285 */
- if (of_machine_is_compatible("fsl,imx6dl"))
- return 0;
-
spi_imx->wml = spi_imx->devtype_data->fifo_size / 2;
/* Prepare for TX DMA: */
--
2.7.4
From: Robin Gong <[email protected]>
Since sdma_transfer_init() will do sdma_load_context before any
sdma transfer, no need once more in sdma_config_channel().
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Vinod Koul <[email protected]>
---
drivers/dma/imx-sdma.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 21db6b69..dbd1dcd 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -1134,7 +1134,6 @@ static void sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac)
static int sdma_config_channel(struct dma_chan *chan)
{
struct sdma_channel *sdmac = to_sdma_chan(chan);
- int ret;
sdma_disable_channel(chan);
@@ -1174,9 +1173,7 @@ static int sdma_config_channel(struct dma_chan *chan)
sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */
}
- ret = sdma_load_context(sdmac);
-
- return ret;
+ return 0;
}
static int sdma_set_channel_priority(struct sdma_channel *sdmac,
--
2.7.4
From: Robin Gong <[email protected]>
Add mcu_2_ecspi script to fix ecspi errata ERR009165.
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Vinod Koul <[email protected]>
---
drivers/dma/imx-sdma.c | 3 +++
include/linux/platform_data/dma-imx-sdma.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index dbd1dcd..61af656 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -924,6 +924,9 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
emi_2_per = sdma->script_addrs->mcu_2_ata_addr;
break;
case IMX_DMATYPE_CSPI:
+ per_2_emi = sdma->script_addrs->app_2_mcu_addr;
+ emi_2_per = sdma->script_addrs->mcu_2_ecspi_addr;
+ break;
case IMX_DMATYPE_EXT:
case IMX_DMATYPE_SSI:
case IMX_DMATYPE_SAI:
diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h
index 6eaa53c..f794fee 100644
--- a/include/linux/platform_data/dma-imx-sdma.h
+++ b/include/linux/platform_data/dma-imx-sdma.h
@@ -51,6 +51,7 @@ struct sdma_script_start_addrs {
/* End of v2 array */
s32 zcanfd_2_mcu_addr;
s32 zqspi_2_mcu_addr;
+ s32 mcu_2_ecspi_addr;
/* End of v3 array */
};
--
2.7.4
From: Robin Gong <[email protected]>
This reverts commit ad0d92d7ba6aecbe2705907c38ff8d8be4da1e9c, because
in spi-imx case, burst length may be changed dynamically.
Signed-off-by: Robin Gong <[email protected]>
---
drivers/dma/imx-sdma.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index ca296f0..21db6b69 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -377,7 +377,6 @@ struct sdma_channel {
unsigned long watermark_level;
u32 shp_addr, per_addr;
enum dma_status status;
- bool context_loaded;
struct imx_dma_data data;
struct work_struct terminate_worker;
};
@@ -988,9 +987,6 @@ static int sdma_load_context(struct sdma_channel *sdmac)
int ret;
unsigned long flags;
- if (sdmac->context_loaded)
- return 0;
-
if (sdmac->direction == DMA_DEV_TO_MEM)
load_address = sdmac->pc_from_device;
else if (sdmac->direction == DMA_DEV_TO_DEV)
@@ -1033,8 +1029,6 @@ static int sdma_load_context(struct sdma_channel *sdmac)
spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
- sdmac->context_loaded = true;
-
return ret;
}
@@ -1074,7 +1068,6 @@ static void sdma_channel_terminate_work(struct work_struct *work)
sdmac->desc = NULL;
spin_unlock_irqrestore(&sdmac->vc.lock, flags);
vchan_dma_desc_free_list(&sdmac->vc, &head);
- sdmac->context_loaded = false;
}
static int sdma_disable_channel_async(struct dma_chan *chan)
--
2.7.4
From: Robin Gong <[email protected]>
Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
check ignore such special case without dma channel enabled, which caused
ecspi1 rx works failed. Actually, no need to check event_id0/event_id1
and replace checking 'event_id1' with 'DMA_DEV_TO_DEV', so that configure
event_id1 only in case DEV_TO_DEV.
Signed-off-by: Robin Gong <[email protected]>
Acked-by: Vinod Koul <[email protected]>
---
drivers/dma/imx-sdma.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 525ca89..f7c150d 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -1202,7 +1202,7 @@ static int sdma_config_channel(struct dma_chan *chan)
if ((sdmac->peripheral_type != IMX_DMATYPE_MEMORY) &&
(sdmac->peripheral_type != IMX_DMATYPE_DSP)) {
/* Handle multiple event channels differently */
- if (sdmac->event_id1) {
+ if (sdmac->direction == DMA_DEV_TO_DEV) {
if (sdmac->peripheral_type == IMX_DMATYPE_ASRC_SP ||
sdmac->peripheral_type == IMX_DMATYPE_ASRC)
sdma_set_watermarklevel_for_p2p(sdmac);
@@ -1370,9 +1370,9 @@ static void sdma_free_chan_resources(struct dma_chan *chan)
sdma_channel_synchronize(chan);
- if (sdmac->event_id0)
- sdma_event_disable(sdmac, sdmac->event_id0);
- if (sdmac->event_id1)
+ sdma_event_disable(sdmac, sdmac->event_id0);
+
+ if (sdmac->direction == DMA_DEV_TO_DEV)
sdma_event_disable(sdmac, sdmac->event_id1);
sdmac->event_id0 = 0;
@@ -1670,13 +1670,11 @@ static int sdma_config(struct dma_chan *chan,
memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg));
/* Set ENBLn earlier to make sure dma request triggered after that */
- if (sdmac->event_id0) {
- if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events)
- return -EINVAL;
- sdma_event_enable(sdmac, sdmac->event_id0);
- }
+ if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events)
+ return -EINVAL;
+ sdma_event_enable(sdmac, sdmac->event_id0);
- if (sdmac->event_id1) {
+ if (sdmac->direction == DMA_DEV_TO_DEV) {
if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)
return -EINVAL;
sdma_event_enable(sdmac, sdmac->event_id1);
--
2.7.4
From: Robin Gong <[email protected]>
There are two ways for SDMA accessing SPBA devices: one is SDMA->AIPS
->SPBA(masterA port), another is SDMA->SPBA(masterC port). Please refer
to the 'Figure 58-1. i.MX 6Dual/6Quad SPBA connectivity' of i.mx6DQ
Reference Manual. SDMA provide the corresponding app_2_mcu/mcu_2_app and
shp_2_mcu/mcu_2_shp script for such two options. So both AIPS and SPBA
scripts should keep the same behaviour, the issue only caught in AIPS
script sounds not solide.
The issue is more likely as the ecspi errata
ERR009165(http://www.nxp.com/docs/en/errata/IMX6DQCE.pdf):
eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to
be sent twice
So revert commit 'df07101e1c4a' firstly.
Signed-off-by: Robin Gong <[email protected]>
---
arch/arm/boot/dts/imx6q.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index d038f41..7175898 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -172,7 +172,7 @@
clocks = <&clks IMX6Q_CLK_ECSPI5>,
<&clks IMX6Q_CLK_ECSPI5>;
clock-names = "ipg", "per";
- dmas = <&sdma 11 8 1>, <&sdma 12 8 2>;
+ dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
dma-names = "rx", "tx";
status = "disabled";
};
--
2.7.4
From: Robin Gong <[email protected]>
There are two ways for SDMA accessing SPBA devices: one is SDMA->AIPS
->SPBA(masterA port), another is SDMA->SPBA(masterC port). Please refer
to the 'Figure 58-1. i.MX 6Dual/6Quad SPBA connectivity' of i.mx6DQ
Reference Manual. SDMA provide the corresponding app_2_mcu/mcu_2_app and
shp_2_mcu/mcu_2_shp script for such two options. So both AIPS and SPBA
scripts should keep the same behaviour, the issue only caught in AIPS
script sounds not solide.
The issue is more likely as the ecspi errata
ERR009165(http://www.nxp.com/docs/en/errata/IMX6DQCE.pdf):
eCSPI: TXFIFO empty flag glitch can cause the current FIFO transfer to
be sent twice
So revert commit 'dd4b487b32a3' firstly.
Signed-off-by: Robin Gong <[email protected]>
---
arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 929fc7d..b352ea2 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -339,7 +339,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI1>,
<&clks IMX6QDL_CLK_ECSPI1>;
clock-names = "ipg", "per";
- dmas = <&sdma 3 8 1>, <&sdma 4 8 2>;
+ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -353,7 +353,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI2>,
<&clks IMX6QDL_CLK_ECSPI2>;
clock-names = "ipg", "per";
- dmas = <&sdma 5 8 1>, <&sdma 6 8 2>;
+ dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -367,7 +367,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI3>,
<&clks IMX6QDL_CLK_ECSPI3>;
clock-names = "ipg", "per";
- dmas = <&sdma 7 8 1>, <&sdma 8 8 2>;
+ dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -381,7 +381,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI4>,
<&clks IMX6QDL_CLK_ECSPI4>;
clock-names = "ipg", "per";
- dmas = <&sdma 9 8 1>, <&sdma 10 8 2>;
+ dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
dma-names = "rx", "tx";
status = "disabled";
};
--
2.7.4
On 10-06-19, 16:17, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> For the compatibility of NXP internal legacy kernel before 4.19 which
> is based on uart ram script and upstreaming kernel based on uart rom
> script, add both uart ram/rom script in latest sdma firmware. By default
> uart rom script used.
> Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and add
> back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for i.mx6).
>
> rom script:
> uart_2_mcu_addr
> uartsh_2_mcu_addr /* through spba bus */
> ram script:
> uart_2_mcu_ram_addr
> uartsh_2_mcu_ram_addr /* through spba bus */
>
> Please get latest sdma firmware from the below and put them into the path
> (/lib/firmware/imx/sdma/):
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
> /tree/imx/sdma
How does this work with folks have older firmware?
>
> Signed-off-by: Robin Gong <[email protected]>
> ---
> drivers/dma/imx-sdma.c | 4 ++--
> include/linux/platform_data/dma-imx-sdma.h | 10 ++++++++--
> 2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index f7c150d..deea9aa 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -1733,8 +1733,8 @@ static void sdma_issue_pending(struct dma_chan *chan)
>
> #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34
> #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38
> -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41
> -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42
> +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45
> +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46
>
> static void sdma_add_scripts(struct sdma_engine *sdma,
> const struct sdma_script_start_addrs *addr)
> diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h
> index f794fee..e12d2e8 100644
> --- a/include/linux/platform_data/dma-imx-sdma.h
> +++ b/include/linux/platform_data/dma-imx-sdma.h
> @@ -20,12 +20,12 @@ struct sdma_script_start_addrs {
> s32 per_2_firi_addr;
> s32 mcu_2_firi_addr;
> s32 uart_2_per_addr;
> - s32 uart_2_mcu_addr;
> + s32 uart_2_mcu_ram_addr;
> s32 per_2_app_addr;
> s32 mcu_2_app_addr;
> s32 per_2_per_addr;
> s32 uartsh_2_per_addr;
> - s32 uartsh_2_mcu_addr;
> + s32 uartsh_2_mcu_ram_addr;
> s32 per_2_shp_addr;
> s32 mcu_2_shp_addr;
> s32 ata_2_mcu_addr;
> @@ -52,7 +52,13 @@ struct sdma_script_start_addrs {
> s32 zcanfd_2_mcu_addr;
> s32 zqspi_2_mcu_addr;
> s32 mcu_2_ecspi_addr;
> + s32 mcu_2_sai_addr;
> + s32 sai_2_mcu_addr;
> + s32 uart_2_mcu_addr;
> + s32 uartsh_2_mcu_addr;
> /* End of v3 array */
> + s32 mcu_2_zqspi_addr;
> + /* End of v4 array */
> };
>
> /**
> --
> 2.7.4
--
~Vinod
On 2019-06-10 at 12:55 +0000, Vinod Koul wrote:
> On 10-06-19, 16:17, [email protected] wrote:
> >
> > From: Robin Gong <[email protected]>
> >
> > For the compatibility of NXP internal legacy kernel before 4.19
> > which
> > is based on uart ram script and upstreaming kernel based on uart
> > rom
> > script, add both uart ram/rom script in latest sdma firmware. By
> > default
> > uart rom script used.
> > Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and
> > add
> > back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for
> > i.mx6).
> >
> > rom script:
> > uart_2_mcu_addr
> > uartsh_2_mcu_addr /* through spba bus */
> > ram script:
> > uart_2_mcu_ram_addr
> > uartsh_2_mcu_ram_addr /* through spba bus */
> >
> > Please get latest sdma firmware from the below and put them into
> > the path
> > (/lib/firmware/imx/sdma/):
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fg
> > it.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux
> > -firmware.git&data=02%7C01%7Cyibin.gong%40nxp.com%7C6a7833e8a09
> > 344d9951e08d6eda35fc5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
> > 636957683278190279&sdata=RHeypEOREiPGmKveg6gYPy%2FMg8Dzz4JpcHsm
> > %2Bbdxlzo%3D&reserved=0
> > /tree/imx/sdma
> How does this work with folks have older firmware?
The older SDMA RAM script(firmware) will break the uart driver of
upstreaming kernel for these years, this is why Lucas raise uart driver
patch (commit 905c0decad28) to use ROM script instead. There are two
ways to fix uart issue: one is checking 'Idle Condition
Detection'/'Aging timer' in RAM script and enable 'IDLE' in uart
driver, another is only checking 'Aging timer' in ROM script and
adjusting RX FIFO burst length one word less to ensure at least one
word left forever in RX FIFO which is the trigger requirement of 'Aging
timer'(So no need 'IDLE', 'Aging time' is enough) . FSL/NXP internal
kernel go with the first option, while upstreaming kernel go with the
second. Since Lucas's patch assume ROM script used in kernel and
disable 'IDLE', upstreaming kernel broken in uart driver with older
firmware for these years. So this patch is just for fix this
compatibility issue with the ram script(older firmware) updated in
linux-firmware(done already.), thus both RAM script and ROM script can
work in kernel. Besides, kernel with the latest RAM firmware and this
patch set can workaround ecspi issue without any function break which
Lucas concerned about.
>
> >
> >
> > Signed-off-by: Robin Gong <[email protected]>
> > ---
> > drivers/dma/imx-sdma.c | 4 ++--
> > include/linux/platform_data/dma-imx-sdma.h | 10 ++++++++--
> > 2 files changed, 10 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > index f7c150d..deea9aa 100644
> > --- a/drivers/dma/imx-sdma.c
> > +++ b/drivers/dma/imx-sdma.c
> > @@ -1733,8 +1733,8 @@ static void sdma_issue_pending(struct
> > dma_chan *chan)
> >
> > #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34
> > #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38
> > -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41
> > -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42
> > +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45
> > +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46
> >
> > static void sdma_add_scripts(struct sdma_engine *sdma,
> > const struct sdma_script_start_addrs *addr)
> > diff --git a/include/linux/platform_data/dma-imx-sdma.h
> > b/include/linux/platform_data/dma-imx-sdma.h
> > index f794fee..e12d2e8 100644
> > --- a/include/linux/platform_data/dma-imx-sdma.h
> > +++ b/include/linux/platform_data/dma-imx-sdma.h
> > @@ -20,12 +20,12 @@ struct sdma_script_start_addrs {
> > s32 per_2_firi_addr;
> > s32 mcu_2_firi_addr;
> > s32 uart_2_per_addr;
> > - s32 uart_2_mcu_addr;
> > + s32 uart_2_mcu_ram_addr;
> > s32 per_2_app_addr;
> > s32 mcu_2_app_addr;
> > s32 per_2_per_addr;
> > s32 uartsh_2_per_addr;
> > - s32 uartsh_2_mcu_addr;
> > + s32 uartsh_2_mcu_ram_addr;
> > s32 per_2_shp_addr;
> > s32 mcu_2_shp_addr;
> > s32 ata_2_mcu_addr;
> > @@ -52,7 +52,13 @@ struct sdma_script_start_addrs {
> > s32 zcanfd_2_mcu_addr;
> > s32 zqspi_2_mcu_addr;
> > s32 mcu_2_ecspi_addr;
> > + s32 mcu_2_sai_addr;
> > + s32 sai_2_mcu_addr;
> > + s32 uart_2_mcu_addr;
> > + s32 uartsh_2_mcu_addr;
> > /* End of v3 array */
> > + s32 mcu_2_zqspi_addr;
> > + /* End of v4 array */
> > };
> >
> > /**
> > --
> > 2.7.4
On 11-06-19, 03:04, Robin Gong wrote:
> On 2019-06-10 at 12:55 +0000, Vinod Koul wrote:
> > On 10-06-19, 16:17, [email protected] wrote:
> > >
> > > From: Robin Gong <[email protected]>
> > >
> > > For the compatibility of NXP internal legacy kernel before 4.19
> > > which
> > > is based on uart ram script and upstreaming kernel based on uart
> > > rom
> > > script, add both uart ram/rom script in latest sdma firmware. By
> > > default
> > > uart rom script used.
> > > Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and
> > > add
> > > back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for
> > > i.mx6).
> > >
> > > rom script:
> > > uart_2_mcu_addr
> > > uartsh_2_mcu_addr /* through spba bus */
> > > ram script:
> > > uart_2_mcu_ram_addr
> > > uartsh_2_mcu_ram_addr /* through spba bus */
> > >
> > > Please get latest sdma firmware from the below and put them into
> > > the path
> > > (/lib/firmware/imx/sdma/):
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fg
> > > it.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux
> > > -firmware.git&data=02%7C01%7Cyibin.gong%40nxp.com%7C6a7833e8a09
> > > 344d9951e08d6eda35fc5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C
> > > 636957683278190279&sdata=RHeypEOREiPGmKveg6gYPy%2FMg8Dzz4JpcHsm
> > > %2Bbdxlzo%3D&reserved=0
> > > /tree/imx/sdma
> > How does this work with folks have older firmware?
> The older SDMA RAM script(firmware) will break the uart driver of
> upstreaming kernel for these years, this is why Lucas raise uart driver
> patch (commit 905c0decad28) to use ROM script instead. There are two
> ways to fix uart issue: one is checking 'Idle Condition
> Detection'/'Aging timer' in RAM script and enable 'IDLE' in uart
> driver, another is only checking 'Aging timer' in ROM script and
> adjusting RX FIFO burst length one word less to ensure at least one
> word left forever in RX FIFO which is the trigger requirement of 'Aging
> timer'(So no need 'IDLE', 'Aging time' is enough) . FSL/NXP internal
> kernel go with the first option, while upstreaming kernel go with the
> second. Since Lucas's patch assume ROM script used in kernel and
> disable 'IDLE', upstreaming kernel broken in uart driver with older
> firmware for these years. So this patch is just for fix this
> compatibility issue with the ram script(older firmware) updated in
> linux-firmware(done already.), thus both RAM script and ROM script can
> work in kernel. Besides, kernel with the latest RAM firmware and this
> patch set can workaround ecspi issue without any function break which
> Lucas concerned about.
Acked-by: Vinod Koul <[email protected]>
--
~Vinod
On Mon, 10 Jun 2019 16:17:48 +0800, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> Add i.mx6ul and i.mx6sx compatible name in binding doc.
>
> Signed-off-by: Robin Gong <[email protected]>
> ---
> Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
On 2019-06-11 at 22:35 +0000, Rob Herring wrote:
> On Mon, 10 Jun 2019 16:17:48 +0800, [email protected] wrote:
> >
> > From: Robin Gong <[email protected]>
> >
> > Add i.mx6ul and i.mx6sx compatible name in binding doc.
> >
> > Signed-off-by: Robin Gong <[email protected]>
> > ---
> > Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> Please add Acked-by/Reviewed-by tags when posting new versions.
> However,
> there's no need to repost patches *only* to add the tags. The
> upstream
> maintainer will do that for acks received on the version they apply.
>
> If a tag was not added on purpose, please state why and what changed.
Sorry Rob...I miss your mail with 'Reviewed-by' in v2 because it slip
into 'unk Email' folder. Will add your tag in v6 if comments received
from v5
Hello Shawn/Will,
Do you have comments for this V5 patch set? I got tags from Mark,
Vinod and Rob.
On 2019-06-10 at 08:17 +0000, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> transfer to be send twice in DMA mode. Please get more information
> from:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww
> .nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyibin
> .gong%40nxp.com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d3bc2b4c6f
> a92cd99c5c301635%7C0%7C1%7C636957513814970412&sdata=%2F9sbrDEmIpu
> OazcIAVpIrELZMEjO94%2Bjen7wOOlVsVk%3D&reserved=0. The workaround
> is adding
> new sdma ram script which works in XCH mode as PIO inside sdma
> instead
> of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should
> be
> exist on all legacy i.mx6/7 soc family before i.mx6ul.
> NXP fix this design issue from i.mx6ul, so newer chips including
> i.mx6ul/
> 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8
> chips
> still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
> for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need
> errata
> or not.
> The first two reverted patches should be the same issue, though, it
> seems 'fixed' by changing to other shp script. Hope Sean or Sascha
> could
> have the chance to test this patch set if could fix their issues.
> Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not
> work
> on i.mx8mm because the event id is zero.
>
> PS:
> Please get sdma firmware from below linux-firmware and copy it to
> your
> local rootfs /lib/firmware/imx/sdma.
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit
> .kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-
> firmware.git%2Ftree%2Fimx%2Fsdma&data=02%7C01%7Cyibin.gong%40nxp.
> com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C1%7C636957513814970412&sdata=xXHBWpSaSLmMosb%2FajOAiXn
> nkxaYV6HCt25OOzgRLbI%3D&reserved=0
>
> v2:
> 1.Add commit log for reverted patches.
> 2.Add comment for 'ecspi_fixed' in sdma driver.
> 3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
> rather than remove.
> v3:
> 1.Confirm with design team make sure ERR009165 fixed on
> i.mx6ul/i.mx6ull
> /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy
> chips.
> Correct dts related dts patch in v2.
> 2.Clean eratta information in binding doc and new 'tx_glitch_fixed'
> flag
> in spi-imx driver to state ERR009165 fixed or not.
> 3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in
> the
> errata workaroud, thus improve performance as possible.
> v4:
> 1.add Ack tag from Mark and Vinod
> 2. remove checking 'event_id1' zero as 'event_id0'.
> v5:
> 1.Add another patch for compatible with the current uart driver
> which
> using rom script, so both uart ram script and rom script
> supported
> in latest firmware, by default uart rom script used. UART driver
> will be broken without this patch. Latest sdma firmware has been
> already updated in linux-firmware.
>
> Robin Gong (15):
> Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
> Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
> Revert "dmaengine: imx-sdma: refine to load context only once"
> dmaengine: imx-sdma: remove dupilicated sdma_load_context
> dmaengine: imx-sdma: add mcu_2_ecspi script
> spi: imx: fix ERR009165
> spi: imx: remove ERR009165 workaround on i.mx6ul
> spi: imx: add new i.mx6ul compatible name in binding doc
> dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
> dma: imx-sdma: add i.mx6ul/6sx compatible name
> dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
> ARM: dts: imx6ul: add dma support on ecspi
> ARM: dts: imx6sll: correct sdma compatible
> arm64: defconfig: Enable SDMA on i.mx8mq/8mm
> dmaengine: imx-sdma: add uart rom script
>
> .../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +
> .../devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
> arch/arm/boot/dts/imx6q.dtsi | 2 +-
> arch/arm/boot/dts/imx6qdl.dtsi | 8 +-
> arch/arm/boot/dts/imx6sll.dtsi | 2 +-
> arch/arm/boot/dts/imx6ul.dtsi | 8 ++
> arch/arm64/configs/defconfig | 3 +
> drivers/dma/imx-sdma.c | 88
> ++++++++++++++++------
> drivers/spi/spi-imx.c | 61
> ++++++++++++---
> include/linux/platform_data/dma-imx-sdma.h | 11 ++-
> 10 files changed, 145 insertions(+), 41 deletions(-)
>
On Fri, Jun 21, 2019 at 08:42:48AM +0000, Robin Gong wrote:
> Hello Shawn/Will,
> ? Do you have comments for this V5 patch set? I got tags from Mark,
> Vinod and Rob.
I'm fine with the DTS change, but not sure how the series should be
merged.
Shawn
>
> On 2019-06-10 at 08:17 +0000, [email protected] wrote:
> > From: Robin Gong <[email protected]>
> >
> > ? There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> > transfer to be send twice in DMA mode. Please get more information
> > from:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww
> > .nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyibin
> > .gong%40nxp.com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d3bc2b4c6f
> > a92cd99c5c301635%7C0%7C1%7C636957513814970412&sdata=%2F9sbrDEmIpu
> > OazcIAVpIrELZMEjO94%2Bjen7wOOlVsVk%3D&reserved=0. The workaround
> > is adding
> > new sdma ram script which works in XCH??mode as PIO inside sdma
> > instead
> > of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should
> > be
> > exist on all legacy i.mx6/7 soc family before i.mx6ul.
> > ? NXP fix this design issue from i.mx6ul, so newer chips including
> > i.mx6ul/
> > 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8
> > chips
> > still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
> > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need
> > errata
> > or not.
> > ? The first two reverted patches should be the same issue, though, it
> > seems 'fixed' by changing to other shp script. Hope Sean or Sascha
> > could
> > have the chance to test this patch set if could fix their issues.
> > ? Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not
> > work
> > on i.mx8mm because the event id is zero.
> >
> > PS:
> > ???Please get sdma firmware from below linux-firmware and copy it to
> > your
> > local rootfs /lib/firmware/imx/sdma.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit
> > .kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-
> > firmware.git%2Ftree%2Fimx%2Fsdma&data=02%7C01%7Cyibin.gong%40nxp.
> > com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d3bc2b4c6fa92cd99c5c30
> > 1635%7C0%7C1%7C636957513814970412&sdata=xXHBWpSaSLmMosb%2FajOAiXn
> > nkxaYV6HCt25OOzgRLbI%3D&reserved=0
> >
> > v2:
> > ? 1.Add commit log for reverted patches.
> > ? 2.Add comment for 'ecspi_fixed' in sdma driver.
> > ? 3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
> > ????rather than remove.
> > v3:
> > ? 1.Confirm with design team make sure ERR009165 fixed on
> > i.mx6ul/i.mx6ull
> > ????/i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy
> > chips.
> > ????Correct dts related dts patch in v2.
> > ? 2.Clean eratta information in binding doc and new 'tx_glitch_fixed'
> > flag
> > ????in spi-imx driver to state ERR009165 fixed or not.
> > ? 3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in
> > the
> > ????errata workaroud, thus improve performance as possible.
> > v4:
> > ? 1.add Ack tag from Mark and Vinod
> > ? 2. remove checking 'event_id1' zero as 'event_id0'.
> > v5:
> > ? 1.Add another patch for compatible with the current uart driver
> > which
> > ????using rom script, so both uart ram script and rom script
> > supported
> > ????in latest firmware, by default uart rom script used. UART driver
> > ????will be broken without this patch. Latest sdma firmware has been
> > ????already updated in linux-firmware.?
> >
> > Robin Gong (15):
> > ? Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
> > ? Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
> > ? Revert "dmaengine: imx-sdma: refine to load context only once"
> > ? dmaengine: imx-sdma: remove dupilicated sdma_load_context
> > ? dmaengine: imx-sdma: add mcu_2_ecspi script
> > ? spi: imx: fix ERR009165
> > ? spi: imx: remove ERR009165 workaround on i.mx6ul
> > ? spi: imx: add new i.mx6ul compatible name in binding doc
> > ? dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
> > ? dma: imx-sdma: add i.mx6ul/6sx compatible name
> > ? dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
> > ? ARM: dts: imx6ul: add dma support on ecspi
> > ? ARM: dts: imx6sll: correct sdma compatible
> > ? arm64: defconfig: Enable SDMA on i.mx8mq/8mm
> > ? dmaengine: imx-sdma: add uart rom script
> >
> > ?.../devicetree/bindings/dma/fsl-imx-sdma.txt???????|??2 +
> > ?.../devicetree/bindings/spi/fsl-imx-cspi.txt???????|??1 +
> > ?arch/arm/boot/dts/imx6q.dtsi???????????????????????|??2 +-
> > ?arch/arm/boot/dts/imx6qdl.dtsi?????????????????????|??8 +-
> > ?arch/arm/boot/dts/imx6sll.dtsi?????????????????????|??2 +-
> > ?arch/arm/boot/dts/imx6ul.dtsi??????????????????????|??8 ++
> > ?arch/arm64/configs/defconfig???????????????????????|??3 +
> > ?drivers/dma/imx-sdma.c?????????????????????????????| 88
> > ++++++++++++++++------
> > ?drivers/spi/spi-imx.c??????????????????????????????| 61
> > ++++++++++++---
> > ?include/linux/platform_data/dma-imx-sdma.h?????????| 11 ++-
> > ?10 files changed, 145 insertions(+), 41 deletions(-)
> >
Thanks Shawn. If no comment here, I think you can merge dts patch firstly in your tree since
those dts patches are harmless, Mark and Vinod would merge SPI/DMA patches into
their trees? Hope imx/spi/dmaengin trees could merge into the same rc on linux-next, otherwise
SPI function maybe broken.
> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: 2019年6月24日 8:17
> Subject: Re: [PATCH v5 00/15] add ecspi ERR009165 for i.mx6/7 soc family
>
> On Fri, Jun 21, 2019 at 08:42:48AM +0000, Robin Gong wrote:
> > Hello Shawn/Will,
> > Do you have comments for this V5 patch set? I got tags from Mark,
> > Vinod and Rob.
>
> I'm fine with the DTS change, but not sure how the series should be merged.
>
> Shawn
>
> >
> > On 2019-06-10 at 08:17 +0000, [email protected] wrote:
> > > From: Robin Gong <[email protected]>
> > >
> > > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> > > transfer to be send twice in DMA mode. Please get more information
> > > from:
> > > https://www
> > > .nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01
> %7Cyibi
> > > n
> > > .gong%40nxp.com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d
> 3bc2b4c6
> > > f
> > >
> a92cd99c5c301635%7C0%7C1%7C636957513814970412&sdata=%2F9s
> brDEmIp
> > > u OazcIAVpIrELZMEjO94%2Bjen7wOOlVsVk%3D&reserved=0. The
> > > workaround is adding new sdma ram script which works in XCH mode as
> > > PIO inside sdma instead of SMC mode, meanwhile, 'TX_THRESHOLD'
> > > should be 0. The issue should be exist on all legacy i.mx6/7 soc
> > > family before i.mx6ul.
> > > NXP fix this design issue from i.mx6ul, so newer chips including
> > > i.mx6ul/ 6ull/6sll do not need this workaroud anymore. All other
> > > i.mx6/7/8 chips still need this workaroud. This patch set add new
> > > 'fsl,imx6ul-ecspi'
> > > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need
> > > errata or not.
> > > The first two reverted patches should be the same issue, though,
> > > it seems 'fixed' by changing to other shp script. Hope Sean or
> > > Sascha could have the chance to test this patch set if could fix
> > > their issues.
> > > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not
> > > work on i.mx8mm because the event id is zero.
> > >
> > > PS:
> > > Please get sdma firmware from below linux-firmware and copy it to
> > > your local rootfs /lib/firmware/imx/sdma.
> > > https://git
> > > .kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-
> > >
> firmware.git%2Ftree%2Fimx%2Fsdma&data=02%7C01%7Cyibin.gong%40
> nxp.
> > >
> com%7C67d3e78fe5ef4428b3af08d6ed7beb74%7C686ea1d3bc2b4c6fa92cd9
> 9c5c3
> > > 0
> > >
> 1635%7C0%7C1%7C636957513814970412&sdata=xXHBWpSaSLmMosb
> %2FajOAiX
> > > n
> > > nkxaYV6HCt25OOzgRLbI%3D&reserved=0
> > >
> > > v2:
> > > 1.Add commit log for reverted patches.
> > > 2.Add comment for 'ecspi_fixed' in sdma driver.
> > > 3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
> > > rather than remove.
> > > v3:
> > > 1.Confirm with design team make sure ERR009165 fixed on
> > > i.mx6ul/i.mx6ull
> > > /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy
> > > chips.
> > > Correct dts related dts patch in v2.
> > > 2.Clean eratta information in binding doc and new 'tx_glitch_fixed'
> > > flag
> > > in spi-imx driver to state ERR009165 fixed or not.
> > > 3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in
> > > the
> > > errata workaroud, thus improve performance as possible.
> > > v4:
> > > 1.add Ack tag from Mark and Vinod
> > > 2. remove checking 'event_id1' zero as 'event_id0'.
> > > v5:
> > > 1.Add another patch for compatible with the current uart driver
> > > which
> > > using rom script, so both uart ram script and rom script
> > > supported
> > > in latest firmware, by default uart rom script used. UART driver
> > > will be broken without this patch. Latest sdma firmware has been
> > > already updated in linux-firmware.
> > >
> > > Robin Gong (15):
> > > Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
> > > Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
> > > Revert "dmaengine: imx-sdma: refine to load context only once"
> > > dmaengine: imx-sdma: remove dupilicated sdma_load_context
> > > dmaengine: imx-sdma: add mcu_2_ecspi script
> > > spi: imx: fix ERR009165
> > > spi: imx: remove ERR009165 workaround on i.mx6ul
> > > spi: imx: add new i.mx6ul compatible name in binding doc
> > > dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
> > > dma: imx-sdma: add i.mx6ul/6sx compatible name
> > > dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
> > > ARM: dts: imx6ul: add dma support on ecspi
> > > ARM: dts: imx6sll: correct sdma compatible
> > > arm64: defconfig: Enable SDMA on i.mx8mq/8mm
> > > dmaengine: imx-sdma: add uart rom script
> > >
> > > .../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 +
> > > .../devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
> > > arch/arm/boot/dts/imx6q.dtsi | 2 +-
> > > arch/arm/boot/dts/imx6qdl.dtsi | 8 +-
> > > arch/arm/boot/dts/imx6sll.dtsi | 2 +-
> > > arch/arm/boot/dts/imx6ul.dtsi | 8 ++
> > > arch/arm64/configs/defconfig | 3 +
> > > drivers/dma/imx-sdma.c | 88
> > > ++++++++++++++++------
> > > drivers/spi/spi-imx.c | 61
> > > ++++++++++++---
> > > include/linux/platform_data/dma-imx-sdma.h | 11 ++-
> > > 10 files changed, 145 insertions(+), 41 deletions(-)
> > >
On Mon, 10 Jun 2019 16:17:46 +0800, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> ERR009165 fixed from i.mx6ul, add its compatible name in binding
> doc.
>
> Signed-off-by: Robin Gong <[email protected]>
> Acked-by: Mark Brown <[email protected]>
> ---
> Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Mon, Jun 10, 2019 at 04:17:50PM +0800, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> Add dma support on ecspi.
>
> Signed-off-by: Robin Gong <[email protected]>
Applied, thanks.
On Mon, Jun 10, 2019 at 04:17:51PM +0800, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> Correct sdma compatible since ecspi errata ERR009165 has been fixed
> on i.mx6sll as i.mx6ul.
>
> Signed-off-by: Robin Gong <[email protected]>
Applied, thanks.
On Mon, Jun 10, 2019 at 04:17:52PM +0800, [email protected] wrote:
> From: Robin Gong <[email protected]>
>
> Enable SDMA support on i.mx8mq/8mm chips, including enabling
> CONFIG_FW_LOADER_USER_HELPER/CONFIG_FW_LOADER_USER_HELPER_FALLBACK
> for firmware loaded by udev.
>
> Signed-off-by: Robin Gong <[email protected]>
Applied, thanks.
On 2019-7-17 at 14:42 Shawn Guo <[email protected]> wrote:
> On Mon, Jun 10, 2019 at 04:17:50PM +0800, [email protected] wrote:
> > From: Robin Gong <[email protected]>
> >
> > Add dma support on ecspi.
> >
> > Signed-off-by: Robin Gong <[email protected]>
>
> Applied, thanks.
Thanks Shawn, but how about other dts patches such as 01/15,02/15?
Hi Mark and Vinod,
I got Ack from you last month on v5, https://patchwork.kernel.org/cover/10984301/
Is it the right time to apply v5 ? Any concern, please let me know, thanks.
On Tue, Jul 23, 2019 at 09:39:38AM +0000, Robin Gong wrote:
> On 2019-7-17 at 14:42 Shawn Guo <[email protected]> wrote:
> > On Mon, Jun 10, 2019 at 04:17:50PM +0800, [email protected] wrote:
> > > From: Robin Gong <[email protected]>
> > >
> > > Add dma support on ecspi.
> > >
> > > Signed-off-by: Robin Gong <[email protected]>
> >
> > Applied, thanks.
> Thanks Shawn, but how about other dts patches such as 01/15,02/15?
I need the authors of the commits being reverted agree on the reverting.
Sean Nyekjaer <[email protected]>
Sascha Hauer <[email protected]>
Shawn
On 2019-7-24 at 08:49 Shawn Guo <[email protected]> wrote:
> On Tue, Jul 23, 2019 at 09:39:38AM +0000, Robin Gong wrote:
> > On 2019-7-17 at 14:42 Shawn Guo <[email protected]> wrote:
> > > On Mon, Jun 10, 2019 at 04:17:50PM +0800, [email protected] wrote:
> > > > From: Robin Gong <[email protected]>
> > > >
> > > > Add dma support on ecspi.
> > > >
> > > > Signed-off-by: Robin Gong <[email protected]>
> > >
> > > Applied, thanks.
> > Thanks Shawn, but how about other dts patches such as 01/15,02/15?
>
> I need the authors of the commits being reverted agree on the reverting.
>
> Sean Nyekjaer <[email protected]>
> Sascha Hauer <[email protected]>
Seems Sean's mail can't be reached.
Hello Sacha, Could you please help test if my patch set could fix your issue even
I revert your patch?
https://patchwork.kernel.org/cover/10984301/
>
> Shawn
Ping Sacha...
On 2019-7-24 9:53 Robin Gong wrote:
> On 2019-7-24 at 08:49 Shawn Guo <[email protected]> wrote:
> > On Tue, Jul 23, 2019 at 09:39:38AM +0000, Robin Gong wrote:
> > > On 2019-7-17 at 14:42 Shawn Guo <[email protected]> wrote:
> > > > On Mon, Jun 10, 2019 at 04:17:50PM +0800, [email protected]
> wrote:
> > > > > From: Robin Gong <[email protected]>
> > > > >
> > > > > Add dma support on ecspi.
> > > > >
> > > > > Signed-off-by: Robin Gong <[email protected]>
> > > >
> > > > Applied, thanks.
> > > Thanks Shawn, but how about other dts patches such as 01/15,02/15?
> >
> > I need the authors of the commits being reverted agree on the reverting.
> >
> > Sean Nyekjaer <[email protected]>
> > Sascha Hauer <[email protected]>
> Seems Sean's mail can't be reached.
> Hello Sacha, Could you please help test if my patch set could fix your issue
> even I revert your patch?
> https://patchwork.kernel.org/cover/10984301/
> >
> > Shawn
Hi Robin,
> From: Robin Gong <yibin.gong at nxp.com>
>
> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
> check ignore such special case without dma channel enabled, which caused
> ecspi1 rx works failed. Actually, no need to check event_id0/event_id1
> and replace checking 'event_id1' with 'DMA_DEV_TO_DEV', so that configure
> event_id1 only in case DEV_TO_DEV.
>
> Signed-off-by: Robin Gong <yibin.gong at nxp.com>
> Acked-by: Vinod Koul <vkoul at kernel.org>
I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm
currently testing with v5.3 and as SPI didn't work, I tried two
different things:
1. Removing 'dmas' and 'dma-names' from the ecspi1 node in imx8mm.dtsi,
to use PIO instead of DMA. This works as expected and the driver
boots with the following messages:
spi_imx 30820000.spi: dma setup error -19, use pio
m25p80 spi0.0: mx25v8035f (1024 Kbytes)
spi_imx 30820000.spi: probed
2. Applying your patchset and use DMA. In this case, the flash also
works fine, but there are some error messages printed while booting:
spi_master spi0: I/O Error in DMA RX
m25p80 spi0.0: SPI transfer failed: -110
spi_master spi0: failed to transfer one message from queue
m25p80 spi0.0: mx25v8035f (1024 Kbytes)
spi_imx 30820000.spi: probed
It would be great to get your patches merged and fix SPI + DMA, but for
i.MX8MM, we need to get rid of the error messages. Do you have an idea,
what's wrong?
Thanks,
Frieder
On 2019-9-24 21:28 Schrempf Frieder <[email protected]> wrote:
>
> Hi Robin,
>
> > From: Robin Gong <yibin.gong at nxp.com>
> >
> > Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
> > check ignore such special case without dma channel enabled, which
> > caused
> > ecspi1 rx works failed. Actually, no need to check event_id0/event_id1
> > and replace checking 'event_id1' with 'DMA_DEV_TO_DEV', so that
> > configure
> > event_id1 only in case DEV_TO_DEV.
> >
> > Signed-off-by: Robin Gong <yibin.gong at nxp.com>
> > Acked-by: Vinod Koul <vkoul at kernel.org>
>
> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm currently
> testing with v5.3 and as SPI didn't work, I tried two different things:
>
> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in imx8mm.dtsi,
> to use PIO instead of DMA. This works as expected and the driver
> boots with the following messages:
>
> spi_imx 30820000.spi: dma setup error -19, use pio
> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> spi_imx 30820000.spi: probed
>
> 2. Applying your patchset and use DMA. In this case, the flash also
> works fine, but there are some error messages printed while booting:
>
> spi_master spi0: I/O Error in DMA RX
> m25p80 spi0.0: SPI transfer failed: -110
> spi_master spi0: failed to transfer one message from queue
> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> spi_imx 30820000.spi: probed
>
> It would be great to get your patches merged and fix SPI + DMA, but for
> i.MX8MM, we need to get rid of the error messages. Do you have an idea,
> what's wrong?
Could you check if the length of spi message is bigger than fifo_size during
spi_nor probe? If yes, at that time maybe sdma firmware not loaded.
if (transfer->len < spi_imx->devtype_data->fifo_size)
> Thanks,
> Frieder
On 25.09.19 13:26, Robin Gong wrote:
> On 2019-9-24 21:28 Schrempf Frieder <[email protected]> wrote:
>>
>> Hi Robin,
>>
>>> From: Robin Gong <yibin.gong at nxp.com>
>>>
>>> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
>>> check ignore such special case without dma channel enabled, which
>>> caused
>>> ecspi1 rx works failed. Actually, no need to check event_id0/event_id1
>>> and replace checking 'event_id1' with 'DMA_DEV_TO_DEV', so that
>>> configure
>>> event_id1 only in case DEV_TO_DEV.
>>>
>>> Signed-off-by: Robin Gong <yibin.gong at nxp.com>
>>> Acked-by: Vinod Koul <vkoul at kernel.org>
>>
>> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm currently
>> testing with v5.3 and as SPI didn't work, I tried two different things:
>>
>> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in imx8mm.dtsi,
>> to use PIO instead of DMA. This works as expected and the driver
>> boots with the following messages:
>>
>> spi_imx 30820000.spi: dma setup error -19, use pio
>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
>> spi_imx 30820000.spi: probed
>>
>> 2. Applying your patchset and use DMA. In this case, the flash also
>> works fine, but there are some error messages printed while booting:
>>
>> spi_master spi0: I/O Error in DMA RX
>> m25p80 spi0.0: SPI transfer failed: -110
>> spi_master spi0: failed to transfer one message from queue
>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
>> spi_imx 30820000.spi: probed
>>
>> It would be great to get your patches merged and fix SPI + DMA, but for
>> i.MX8MM, we need to get rid of the error messages. Do you have an idea,
>> what's wrong?
> Could you check if the length of spi message is bigger than fifo_size during
> spi_nor probe? If yes, at that time maybe sdma firmware not loaded.
> if (transfer->len < spi_imx->devtype_data->fifo_size)
Indeed, most of the transfers triggered by the SPI NOR dirver are below
fifo_size and work fine, but some are bigger. The transfers therefore
try to use DMA, but the firmware is not loaded yet.
How is this supposed to work? Shouldn't all transfers use PIO as long as
the SDMA firmware is not loaded yet?
(+ Cc: [email protected])
On 2019-9-25 22:53 Schrempf Frieder <[email protected]> wrote:
> On 25.09.19 13:26, Robin Gong wrote:
> > On 2019-9-24 21:28 Schrempf Frieder <[email protected]>
> wrote:
> >>
> >> Hi Robin,
> >>
> >>> From: Robin Gong <yibin.gong at nxp.com>
> >>>
> >>> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
> >>> check ignore such special case without dma channel enabled, which
> >>> caused
> >>> ecspi1 rx works failed. Actually, no need to check
> >>> event_id0/event_id1 and replace checking 'event_id1' with
> >>> 'DMA_DEV_TO_DEV', so that configure
> >>> event_id1 only in case DEV_TO_DEV.
> >>>
> >>> Signed-off-by: Robin Gong <yibin.gong at nxp.com>
> >>> Acked-by: Vinod Koul <vkoul at kernel.org>
> >>
> >> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm
> >> currently testing with v5.3 and as SPI didn't work, I tried two different
> things:
> >>
> >> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in
> imx8mm.dtsi,
> >> to use PIO instead of DMA. This works as expected and the driver
> >> boots with the following messages:
> >>
> >> spi_imx 30820000.spi: dma setup error -19, use pio
> >> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> >> spi_imx 30820000.spi: probed
> >>
> >> 2. Applying your patchset and use DMA. In this case, the flash also
> >> works fine, but there are some error messages printed while
> booting:
> >>
> >> spi_master spi0: I/O Error in DMA RX
> >> m25p80 spi0.0: SPI transfer failed: -110
> >> spi_master spi0: failed to transfer one message from queue
> >> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> >> spi_imx 30820000.spi: probed
> >>
> >> It would be great to get your patches merged and fix SPI + DMA, but
> >> for i.MX8MM, we need to get rid of the error messages. Do you have an
> >> idea, what's wrong?
>
> > Could you check if the length of spi message is bigger than fifo_size
> > during spi_nor probe? If yes, at that time maybe sdma firmware not loaded.
> > if (transfer->len < spi_imx->devtype_data->fifo_size)
>
> Indeed, most of the transfers triggered by the SPI NOR dirver are below
> fifo_size and work fine, but some are bigger. The transfers therefore try to
> use DMA, but the firmware is not loaded yet.
>
> How is this supposed to work? Shouldn't all transfers use PIO as long as the
> SDMA firmware is not loaded yet?
Yes, for ecspi should work with ram script, it's better check if sdma firmware
is ready in spi_imx_dma_configure(), need modification in sdma driver too.
I'll create another patch after this patch set accepted.
>
> (+ Cc: [email protected])
Hi,
On 27.09.19 03:55, Robin Gong wrote:
> On 2019-9-25 22:53 Schrempf Frieder <[email protected]> wrote:
>> On 25.09.19 13:26, Robin Gong wrote:
>>> On 2019-9-24 21:28 Schrempf Frieder <[email protected]>
>> wrote:
>>>>
>>>> Hi Robin,
>>>>
>>>>> From: Robin Gong <yibin.gong at nxp.com>
>>>>>
>>>>> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
>>>>> check ignore such special case without dma channel enabled, which
>>>>> caused
>>>>> ecspi1 rx works failed. Actually, no need to check
>>>>> event_id0/event_id1 and replace checking 'event_id1' with
>>>>> 'DMA_DEV_TO_DEV', so that configure
>>>>> event_id1 only in case DEV_TO_DEV.
>>>>>
>>>>> Signed-off-by: Robin Gong <yibin.gong at nxp.com>
>>>>> Acked-by: Vinod Koul <vkoul at kernel.org>
>>>>
>>>> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm
>>>> currently testing with v5.3 and as SPI didn't work, I tried two different
>> things:
>>>>
>>>> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in
>> imx8mm.dtsi,
>>>> to use PIO instead of DMA. This works as expected and the driver
>>>> boots with the following messages:
>>>>
>>>> spi_imx 30820000.spi: dma setup error -19, use pio
>>>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
>>>> spi_imx 30820000.spi: probed
>>>>
>>>> 2. Applying your patchset and use DMA. In this case, the flash also
>>>> works fine, but there are some error messages printed while
>> booting:
>>>>
>>>> spi_master spi0: I/O Error in DMA RX
>>>> m25p80 spi0.0: SPI transfer failed: -110
>>>> spi_master spi0: failed to transfer one message from queue
>>>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
>>>> spi_imx 30820000.spi: probed
>>>>
>>>> It would be great to get your patches merged and fix SPI + DMA, but
>>>> for i.MX8MM, we need to get rid of the error messages. Do you have an
>>>> idea, what's wrong?
>>
>>> Could you check if the length of spi message is bigger than fifo_size
>>> during spi_nor probe? If yes, at that time maybe sdma firmware not loaded.
>>> if (transfer->len < spi_imx->devtype_data->fifo_size)
>>
>> Indeed, most of the transfers triggered by the SPI NOR dirver are below
>> fifo_size and work fine, but some are bigger. The transfers therefore try to
>> use DMA, but the firmware is not loaded yet.
>>
>> How is this supposed to work? Shouldn't all transfers use PIO as long as the
>> SDMA firmware is not loaded yet?
> Yes, for ecspi should work with ram script, it's better check if sdma firmware
> is ready in spi_imx_dma_configure(), need modification in sdma driver too.
> I'll create another patch after this patch set accepted.
This still seems to be broken upstream. Is anyone working on fixing SPI
+ DMA for i.MX8MM? Otherwise I will send a patch that removes the DMA
from the ecspi nodes in the devicetree.
Thanks,
Frieder
On 2020/02/06 Schrempf Frieder <[email protected]> wrote:
>
> Hi,
> On 27.09.19 03:55, Robin Gong wrote:
> > On 2019-9-25 22:53 Schrempf Frieder <[email protected]> wrote:
> >> On 25.09.19 13:26, Robin Gong wrote:
> >>> On 2019-9-24 21:28 Schrempf Frieder <[email protected]>
> >> wrote:
> >>>>
> >>>> Hi Robin,
> >>>>
> >>>>> From: Robin Gong <yibin.gong at nxp.com>
> >>>>>
> >>>>> Because the number of ecspi1 rx event on i.mx8mm is 0, the
> >>>>> condition check ignore such special case without dma channel
> >>>>> enabled, which caused
> >>>>> ecspi1 rx works failed. Actually, no need to check
> >>>>> event_id0/event_id1 and replace checking 'event_id1' with
> >>>>> 'DMA_DEV_TO_DEV', so that configure
> >>>>> event_id1 only in case DEV_TO_DEV.
> >>>>>
> >>>>> Signed-off-by: Robin Gong <yibin.gong at nxp.com>
> >>>>> Acked-by: Vinod Koul <vkoul at kernel.org>
> >>>>
> >>>> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm
> >>>> currently testing with v5.3 and as SPI didn't work, I tried two
> >>>> different
> >> things:
> >>>>
> >>>> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in
> >> imx8mm.dtsi,
> >>>> to use PIO instead of DMA. This works as expected and the driver
> >>>> boots with the following messages:
> >>>>
> >>>> spi_imx 30820000.spi: dma setup error -19, use pio
> >>>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> >>>> spi_imx 30820000.spi: probed
> >>>>
> >>>> 2. Applying your patchset and use DMA. In this case, the flash also
> >>>> works fine, but there are some error messages printed while
> >> booting:
> >>>>
> >>>> spi_master spi0: I/O Error in DMA RX
> >>>> m25p80 spi0.0: SPI transfer failed: -110
> >>>> spi_master spi0: failed to transfer one message from queue
> >>>> m25p80 spi0.0: mx25v8035f (1024 Kbytes)
> >>>> spi_imx 30820000.spi: probed
> >>>>
> >>>> It would be great to get your patches merged and fix SPI + DMA, but
> >>>> for i.MX8MM, we need to get rid of the error messages. Do you have
> >>>> an idea, what's wrong?
> >>
> >>> Could you check if the length of spi message is bigger than
> >>> fifo_size during spi_nor probe? If yes, at that time maybe sdma firmware
> not loaded.
> >>> if (transfer->len < spi_imx->devtype_data->fifo_size)
> >>
> >> Indeed, most of the transfers triggered by the SPI NOR dirver are
> >> below fifo_size and work fine, but some are bigger. The transfers
> >> therefore try to use DMA, but the firmware is not loaded yet.
> >>
> >> How is this supposed to work? Shouldn't all transfers use PIO as long
> >> as the SDMA firmware is not loaded yet?
> > Yes, for ecspi should work with ram script, it's better check if sdma
> > firmware is ready in spi_imx_dma_configure(), need modification in sdma
> driver too.
> > I'll create another patch after this patch set accepted.
>
> This still seems to be broken upstream. Is anyone working on fixing SPI
> + DMA for i.MX8MM? Otherwise I will send a patch that removes the DMA
> from the ecspi nodes in the devicetree.
Sorry, Frieder, my patch set has been blocked for so long time because I revert
some patches and need get commit from patch owner, unfortunately, I didn't
get any feedback from them although I got ACK from maintainer. I'll pick up
them, rebase and resend it these days, then could address your issue later.