After the qmp phy driver was split it looks like 5.15.y stable kernels
aren't getting fixes like commit 7a7d86d14d07 ("phy: qcom-qmp-combo: fix
broken power on") which is tagged for stable 5.10. Trogdor boards use
the qmp phy on 5.15.y kernels, so I backported the fixes I could find
that looked like we may possibly trip over at some point.
USB and DP work on my Trogdor.Lazor board with this set.
Johan Hovold (4):
phy: qcom-qmp-combo: disable runtime PM on unbind
phy: qcom-qmp-combo: fix memleak on probe deferral
phy: qcom-qmp-combo: fix broken power on
phy: qcom-qmp-combo: fix runtime suspend
drivers/phy/qualcomm/phy-qcom-qmp.c | 72 ++++++++++++++---------------
1 file changed, 36 insertions(+), 36 deletions(-)
Cc: Johan Hovold <[email protected]>
Cc: Dmitry Baryshkov <[email protected]>
Cc: Vinod Koul <[email protected]>
base-commit: d57287729e229188e7d07ef0117fe927664e08cb
--
https://chromeos.dev
From: Johan Hovold <[email protected]>
commit 7a7d86d14d073dfa3429c550667a8e78b99edbd4 upstream.
The PHY is powered on during phy-init by setting the SW_PWRDN bit in the
COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
PHY.
Currently, whether power on succeeds depends on probe order and having
the USB part of the PHY be initialised first. In case the DP part of the
PHY is instead initialised first, the intended power on of the USB block
results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
Add a pointer to the USB part of the PHY to the driver data and use that
to power on the PHY also if the DP part of the PHY is initialised first.
Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
Cc: [email protected] # 5.10
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
[[email protected]: Backport to pre-split driver]
Signed-off-by: Stephen Boyd <[email protected]>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index c6f860ce3d99..9fda6d283f20 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -2919,6 +2919,7 @@ struct qcom_qmp {
struct regulator_bulk_data *vregs;
struct qmp_phy **phys;
+ struct qmp_phy *usb_phy;
struct mutex phy_mutex;
int init_count;
@@ -4554,7 +4555,7 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
struct qcom_qmp *qmp = qphy->qmp;
const struct qmp_phy_cfg *cfg = qphy->cfg;
void __iomem *serdes = qphy->serdes;
- void __iomem *pcs = qphy->pcs;
+ struct qmp_phy *usb_phy = qmp->usb_phy;
void __iomem *dp_com = qmp->dp_com;
int ret, i;
@@ -4620,13 +4621,13 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
} else {
- if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
- qphy_setbits(pcs,
- cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
- cfg->pwrdn_ctrl);
+ if (usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
+ qphy_setbits(usb_phy->pcs,
+ usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
+ usb_phy->cfg->pwrdn_ctrl);
else
- qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,
- cfg->pwrdn_ctrl);
+ qphy_setbits(usb_phy->pcs, QPHY_POWER_DOWN_CONTROL,
+ usb_phy->cfg->pwrdn_ctrl);
}
mutex_unlock(&qmp->phy_mutex);
@@ -5769,6 +5770,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
goto err_node_put;
}
+ if (cfg->type == PHY_TYPE_USB3)
+ qmp->usb_phy = qmp->phys[id];
+
/*
* Register the pipe clock provided by phy.
* See function description to see details of this pipe clock.
@@ -5791,6 +5795,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
id++;
}
+ if (!qmp->usb_phy)
+ return -EINVAL;
+
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
if (!IS_ERR(phy_provider))
dev_info(dev, "Registered Qcom-QMP phy\n");
--
https://chromeos.dev
From: Johan Hovold <[email protected]>
commit 4382d518d1887e62234560ea08a0203d11d28cc1 upstream.
Make sure to disable runtime PM also on driver unbind.
Fixes: ac0d239936bd ("phy: qcom-qmp: Add support for runtime PM").
Signed-off-by: Johan Hovold <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index a9687e040960..7b7557c35af6 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -5740,7 +5740,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
return -ENOMEM;
pm_runtime_set_active(dev);
- pm_runtime_enable(dev);
+ ret = devm_pm_runtime_enable(dev);
+ if (ret)
+ return ret;
/*
* Prevent runtime pm from being ON by default. Users can enable
* it using power/control in sysfs.
@@ -5790,13 +5792,10 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
if (!IS_ERR(phy_provider))
dev_info(dev, "Registered Qcom-QMP phy\n");
- else
- pm_runtime_disable(dev);
return PTR_ERR_OR_ZERO(phy_provider);
err_node_put:
- pm_runtime_disable(dev);
of_node_put(child);
return ret;
}
--
https://chromeos.dev
From: Johan Hovold <[email protected]>
commit 2de8a325b1084330ae500380cc27edc39f488c30 upstream.
Switch to using the device-managed of_iomap helper to avoid leaking
memory on probe deferral and driver unbind.
Note that this helper checks for already reserved regions and may fail
if there are multiple devices claiming the same memory.
Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Signed-off-by: Johan Hovold <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 32 +++++++++++++++--------------
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 7b7557c35af6..c6f860ce3d99 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -5410,17 +5410,17 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
* For dual lane PHYs: tx2 -> 3, rx2 -> 4, pcs_misc (optional) -> 5
* For single lane PHYs: pcs_misc (optional) -> 3.
*/
- qphy->tx = of_iomap(np, 0);
- if (!qphy->tx)
- return -ENOMEM;
+ qphy->tx = devm_of_iomap(dev, np, 0, NULL);
+ if (IS_ERR(qphy->tx))
+ return PTR_ERR(qphy->tx);
- qphy->rx = of_iomap(np, 1);
- if (!qphy->rx)
- return -ENOMEM;
+ qphy->rx = devm_of_iomap(dev, np, 1, NULL);
+ if (IS_ERR(qphy->rx))
+ return PTR_ERR(qphy->rx);
- qphy->pcs = of_iomap(np, 2);
- if (!qphy->pcs)
- return -ENOMEM;
+ qphy->pcs = devm_of_iomap(dev, np, 2, NULL);
+ if (IS_ERR(qphy->pcs))
+ return PTR_ERR(qphy->pcs);
/*
* If this is a dual-lane PHY, then there should be registers for the
@@ -5429,9 +5429,9 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
* offset from the first lane.
*/
if (cfg->is_dual_lane_phy) {
- qphy->tx2 = of_iomap(np, 3);
- qphy->rx2 = of_iomap(np, 4);
- if (!qphy->tx2 || !qphy->rx2) {
+ qphy->tx2 = devm_of_iomap(dev, np, 3, NULL);
+ qphy->rx2 = devm_of_iomap(dev, np, 4, NULL);
+ if (IS_ERR(qphy->tx2) || IS_ERR(qphy->rx2)) {
dev_warn(dev,
"Underspecified device tree, falling back to legacy register regions\n");
@@ -5441,15 +5441,17 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
qphy->rx2 = qphy->rx + QMP_PHY_LEGACY_LANE_STRIDE;
} else {
- qphy->pcs_misc = of_iomap(np, 5);
+ qphy->pcs_misc = devm_of_iomap(dev, np, 5, NULL);
}
} else {
- qphy->pcs_misc = of_iomap(np, 3);
+ qphy->pcs_misc = devm_of_iomap(dev, np, 3, NULL);
}
- if (!qphy->pcs_misc)
+ if (IS_ERR(qphy->pcs_misc)) {
dev_vdbg(dev, "PHY pcs_misc-reg not used\n");
+ qphy->pcs_misc = NULL;
+ }
/*
* Get PHY's Pipe clock, if any. USB3 and PCIe are PIPE3
--
https://chromeos.dev
On Thu, Jan 12, 2023 at 04:54:03PM -0800, Stephen Boyd wrote:
> From: Johan Hovold <[email protected]>
>
> commit 2de8a325b1084330ae500380cc27edc39f488c30 upstream.
>
> Switch to using the device-managed of_iomap helper to avoid leaking
> memory on probe deferral and driver unbind.
>
> Note that this helper checks for already reserved regions and may fail
> if there are multiple devices claiming the same memory.
This bit turned out to catch some buggy bindings and dts, so if you want
to backport this one then the corresponding fixes for that would be
needed as well.
That includes
a5d6b1ac56cb ("phy: qcom-qmp-usb: fix memleak on probe deferral")
and some dts fixes which likely already have been backported.
It may even be preferred to keep to just skip this patch and keep those
small memory leaks on probe deferral to not risk any regressions in
stable.
> Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
> Signed-off-by: Johan Hovold <[email protected]>
> Link: https://lore.kernel.org/r/[email protected]
> Signed-off-by: Vinod Koul <[email protected]>
> Signed-off-by: Stephen Boyd <[email protected]>
Johan
On Thu, Jan 12, 2023 at 04:54:04PM -0800, Stephen Boyd wrote:
> From: Johan Hovold <[email protected]>
>
> commit 7a7d86d14d073dfa3429c550667a8e78b99edbd4 upstream.
>
> The PHY is powered on during phy-init by setting the SW_PWRDN bit in the
> COM_POWER_DOWN_CTRL register and then setting the same bit in the in the
> PCS_POWER_DOWN_CONTROL register that belongs to the USB part of the
> PHY.
>
> Currently, whether power on succeeds depends on probe order and having
> the USB part of the PHY be initialised first. In case the DP part of the
> PHY is instead initialised first, the intended power on of the USB block
> results in a corrupted DP_PHY register (e.g. DP_PHY_AUX_CFG8).
>
> Add a pointer to the USB part of the PHY to the driver data and use that
> to power on the PHY also if the DP part of the PHY is initialised first.
>
> Fixes: 52e013d0bffa ("phy: qcom-qmp: Add support for DP in USB3+DP combo phy")
> Cc: [email protected] # 5.10
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Signed-off-by: Johan Hovold <[email protected]>
> Link: https://lore.kernel.org/r/[email protected]
> Signed-off-by: Vinod Koul <[email protected]>
> [[email protected]: Backport to pre-split driver]
> Signed-off-by: Stephen Boyd <[email protected]>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp.c | 21 ++++++++++++++-------
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> index c6f860ce3d99..9fda6d283f20 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> @@ -2919,6 +2919,7 @@ struct qcom_qmp {
> struct regulator_bulk_data *vregs;
>
> struct qmp_phy **phys;
> + struct qmp_phy *usb_phy;
>
> struct mutex phy_mutex;
> int init_count;
> @@ -4554,7 +4555,7 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
> struct qcom_qmp *qmp = qphy->qmp;
> const struct qmp_phy_cfg *cfg = qphy->cfg;
> void __iomem *serdes = qphy->serdes;
> - void __iomem *pcs = qphy->pcs;
> + struct qmp_phy *usb_phy = qmp->usb_phy;
> void __iomem *dp_com = qmp->dp_com;
> int ret, i;
>
> @@ -4620,13 +4621,13 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
> qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
> SW_PWRDN);
> } else {
> - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
> - qphy_setbits(pcs,
> - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> - cfg->pwrdn_ctrl);
> + if (usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
> + qphy_setbits(usb_phy->pcs,
> + usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> + usb_phy->cfg->pwrdn_ctrl);
> else
> - qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,
> - cfg->pwrdn_ctrl);
> + qphy_setbits(usb_phy->pcs, QPHY_POWER_DOWN_CONTROL,
> + usb_phy->cfg->pwrdn_ctrl);
This bit looks like it requires some more work in order not to break
PCIe and UFS PHYs, which lack the USB registers.
> }
>
> mutex_unlock(&qmp->phy_mutex);
> @@ -5769,6 +5770,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
> goto err_node_put;
> }
>
> + if (cfg->type == PHY_TYPE_USB3)
> + qmp->usb_phy = qmp->phys[id];
> +
> /*
> * Register the pipe clock provided by phy.
> * See function description to see details of this pipe clock.
> @@ -5791,6 +5795,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
> id++;
> }
>
> + if (!qmp->usb_phy)
> + return -EINVAL;
> +
This will break probe of PCIe and UFS PHYs unless you only check this
for combo PHYs.
Perhaps you can rename the usb_phy pointer to something more generic and
set it also for PCIe and UFS so that it always points to the register
block that should be used for QPHY_PCS_POWER_DOWN_CONTROL.
> phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> if (!IS_ERR(phy_provider))
> dev_info(dev, "Registered Qcom-QMP phy\n");
Johan
Quoting Johan Hovold (2023-01-12 23:57:39)
> On Thu, Jan 12, 2023 at 04:54:03PM -0800, Stephen Boyd wrote:
> > From: Johan Hovold <[email protected]>
> >
> > commit 2de8a325b1084330ae500380cc27edc39f488c30 upstream.
> >
> > Switch to using the device-managed of_iomap helper to avoid leaking
> > memory on probe deferral and driver unbind.
> >
> > Note that this helper checks for already reserved regions and may fail
> > if there are multiple devices claiming the same memory.
>
> This bit turned out to catch some buggy bindings and dts, so if you want
> to backport this one then the corresponding fixes for that would be
> needed as well.
>
> That includes
>
> a5d6b1ac56cb ("phy: qcom-qmp-usb: fix memleak on probe deferral")
>
> and some dts fixes which likely already have been backported.
>
> It may even be preferred to keep to just skip this patch and keep those
> small memory leaks on probe deferral to not risk any regressions in
> stable.
I only see qcom,sm8350-qmp-usb3-uni-phy in the stable tree and that
hasn't been changed since the node was introduced. I'll try to port the
exclusive logic from a5d6b1ac56cb into this patch. I don't think it's
preferable to keep the memory leak.
Quoting Johan Hovold (2023-01-13 00:07:32)
> On Thu, Jan 12, 2023 at 04:54:04PM -0800, Stephen Boyd wrote:
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > index c6f860ce3d99..9fda6d283f20 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> > @@ -4620,13 +4621,13 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
> > qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
> > SW_PWRDN);
> > } else {
> > - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
> > - qphy_setbits(pcs,
> > - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> > - cfg->pwrdn_ctrl);
> > + if (usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])
> > + qphy_setbits(usb_phy->pcs,
> > + usb_phy->cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
> > + usb_phy->cfg->pwrdn_ctrl);
> > else
> > - qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,
> > - cfg->pwrdn_ctrl);
> > + qphy_setbits(usb_phy->pcs, QPHY_POWER_DOWN_CONTROL,
> > + usb_phy->cfg->pwrdn_ctrl);
>
> This bit looks like it requires some more work in order not to break
> PCIe and UFS PHYs, which lack the USB registers.
Good point. I don't have PCIe or UFS PHYs so I missed this.
>
> > }
> >
> > mutex_unlock(&qmp->phy_mutex);
> > @@ -5769,6 +5770,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
> > goto err_node_put;
> > }
> >
> > + if (cfg->type == PHY_TYPE_USB3)
I changed this to by 'cfg->type != PHY_TYPE_DP'
> > + qmp->usb_phy = qmp->phys[id];
> > +
> > /*
> > * Register the pipe clock provided by phy.
> > * See function description to see details of this pipe clock.
> > @@ -5791,6 +5795,9 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
> > id++;
> > }
> >
> > + if (!qmp->usb_phy)
> > + return -EINVAL;
> > +
>
> This will break probe of PCIe and UFS PHYs unless you only check this
> for combo PHYs.
>
> Perhaps you can rename the usb_phy pointer to something more generic and
> set it also for PCIe and UFS so that it always points to the register
> block that should be used for QPHY_PCS_POWER_DOWN_CONTROL.
I worry that future backports will be complicated if they use 'usb_phy'.
Maybe I'll just leave this as is.