This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.
Changes in v8:
- rename 'mode' to 'type'
- using devm_reset_control_array_get_exclusive
- move rockchip_combphy_set_mode into rockchip_combphy_init
Changes in v7:
- remove u3otg0_port_en, u3otg1_port_en and pipe_sgmii_mac_sel
- rename regs
Changes in v5:
- modify description for ssc and ext-refclk
- remove apb reset
- add rockchip_combphy_updatel()
- restyle
Changes in v4:
- restyle
- remove some minItems
- add more properties
- remove reset-names
- move #phy-cells
- add rockchip,rk3568-pipe-grf
- add rockchip,rk3568-pipe-phy-grf
- add devm_reset_control_array_get()
- remove clk structure
- change refclk DT parse
- change dev_err message
- add dot to phrase
- add ext_refclk variable
- add enable_ssc variable
- rename rockchip_combphy_param_write
- remove param_read
- replace rockchip-naneng-combphy driver name
- rename node name
Changes in v3:
- Using api devm_reset_control_get_optional_exclusive and dev_err_probe.
- Remove apb_rst.
- Redefine registers address.
- Move pipe_phy_grf0 to rk3568.dtsi
Changes in v2:
- Fix dtschema/dtc warnings/errors
- Using api devm_platform_get_and_ioremap_resource.
- Modify rockchip_combphy_set_Mode.
- Add some PHY registers definition.
- Move phy0 to rk3568.dtsi
Johan Jonker (1):
dt-bindings: soc: grf: add naneng combo phy register compatible
Yifeng Zhao (3):
dt-bindings: phy: rockchip: Add Naneng combo PHY bindings
phy: rockchip: add naneng combo phy for RK3568
arm64: dts: rockchip: add naneng combo phy nodes for rk3568
.../phy/phy-rockchip-naneng-combphy.yaml | 109 ++++
.../devicetree/bindings/soc/rockchip/grf.yaml | 2 +
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 21 +
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++
drivers/phy/rockchip/Kconfig | 8 +
drivers/phy/rockchip/Makefile | 1 +
.../rockchip/phy-rockchip-naneng-combphy.c | 581 ++++++++++++++++++
7 files changed, 769 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
--
2.17.1
From: Johan Jonker <[email protected]>
Add Naneng combo phy register compatible.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Johan Jonker <[email protected]>
Signed-off-by: Yifeng Zhao <[email protected]>
---
Changes in v8: None
Changes in v7: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index b2ba7bed89b2..5079e9d24af6 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -15,6 +15,8 @@ properties:
- items:
- enum:
- rockchip,rk3288-sgrf
+ - rockchip,rk3568-pipe-grf
+ - rockchip,rk3568-pipe-phy-grf
- rockchip,rk3568-usb2phy-grf
- rockchip,rv1108-usbgrf
- const: syscon
--
2.17.1
Hi
Tested complete series on rk3568 based Bananapi R2 Pro
combphy0: usb3 (usbdrd3_0)
combphy1: usb3 (usbdrd3_1)
combphy2: sata (sata2)
Tested-by: Frank Wunderlich <[email protected]>
regards Frank
On 08-02-22, 17:13, Yifeng Zhao wrote:
>
> This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.
Applied 1-3, thanks
--
~Vinod
On Tue, 8 Feb 2022 17:13:22 +0800, Yifeng Zhao wrote:
> This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.
>
> Changes in v8:
> - rename 'mode' to 'type'
> - using devm_reset_control_array_get_exclusive
> - move rockchip_combphy_set_mode into rockchip_combphy_init
>
> [...]
Applied, thanks!
[4/4] arm64: dts: rockchip: add naneng combo phy nodes for rk3568
commit: 3cc8cd2d25954ed5794df2d190b81c7325c584e3
Best regards,
--
Heiko Stuebner <[email protected]>