Hi,
The patches are independent, so they can be picked up as is (or everything
through Qualcomm SoC tree).
Best regards,
Krzysztof
Krzysztof Kozlowski (13):
dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125
dt-bindings: usb: qcom,dwc3: fix clock matching
arm64: dts: qcom: add missing AOSS QMP compatible fallback
arm64: dts: qcom: correct DWC3 node names and unit addresses
arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
arm64: dts: qcom: align DWC3 USB clocks with DT schema
arm64: dts: qcom: align DWC3 USB interrupts with DT schema
.../bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
.../bindings/soc/qcom/qcom,smd-rpm.yaml | 3 +
.../devicetree/bindings/usb/qcom,dwc3.yaml | 226 ++++++++++++++++--
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
arch/arm/boot/dts/qcom-sdx55.dtsi | 11 +-
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 18 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 12 +-
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 +-
arch/arm64/boot/dts/qcom/msm8953.dtsi | 11 +-
arch/arm64/boot/dts/qcom/msm8994.dtsi | 7 +-
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 20 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +-
arch/arm64/boot/dts/qcom/msm8998.dtsi | 13 +-
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 +-
arch/arm64/boot/dts/qcom/qcs404.dtsi | 8 +-
arch/arm64/boot/dts/qcom/sc7180.dtsi | 15 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 34 ++-
arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 26 +-
arch/arm64/boot/dts/qcom/sm6125.dtsi | 16 +-
arch/arm64/boot/dts/qcom/sm6350.dtsi | 11 +-
arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 23 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 +-
25 files changed, 424 insertions(+), 157 deletions(-)
--
2.32.0
Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a
fallback. This fixes dtbs_check warnings like:
sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss-qmp' is not one of
['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp', 'qcom,sdm845-aoss-qmp',
'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp', 'qcom,sm8350-aoss-qmp']
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index e2e173dfada7..d01e98768153 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -33,6 +33,7 @@ properties:
- qcom,sm8150-aoss-qmp
- qcom,sm8250-aoss-qmp
- qcom,sm8350-aoss-qmp
+ - qcom,sm8450-aoss-qmp
- const: qcom,aoss-qmp
reg:
--
2.32.0
Add dedicated compatible for DWC3 USB node name to allow more accurate
DT schema matching.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 367ed913902c..10c1cce74dad 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -428,7 +428,7 @@ frame@f9028000 {
};
usb3: usb@f92f8800 {
- compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
+ compatible = "qcom,msm8994-dwc3", "qcom,dwc3";
reg = <0xf92f8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
--
2.32.0
Add dedicated compatible for DWC3 USB node name to allow more accurate
DT schema matching.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 568821259f11..d912166b7552 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -529,7 +529,7 @@ glink-edge {
};
usb3: usb@7678800 {
- compatible = "qcom,dwc3";
+ compatible = "qcom,qcs404-dwc3", "qcom,dwc3";
reg = <0x07678800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
@@ -558,7 +558,7 @@ usb3_dwc3: usb@7580000 {
};
usb2: usb@79b8800 {
- compatible = "qcom,dwc3";
+ compatible = "qcom,qcs404-dwc3", "qcom,dwc3";
reg = <0x079b8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
--
2.32.0
The AOSS QMP bindings expect all compatibles to be followed by fallback
"qcom,aoss-qmp" because all of these are actually compatible with each
other. This fixes dtbs_check warnings like:
sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-qmp'] is too short
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 86175d257b1e..925340fbbb59 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3219,7 +3219,7 @@ aoss_reset: reset-controller@c2a0000 {
};
aoss_qmp: power-controller@c300000 {
- compatible = "qcom,sc7180-aoss-qmp";
+ compatible = "qcom,sc7180-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 0>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index ccf5e95071f9..e2857d3393ef 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3835,7 +3835,7 @@ aoss_reset: reset-controller@c2a0000 {
};
aoss_qmp: power-controller@c300000 {
- compatible = "qcom,sc7280-aoss-qmp";
+ compatible = "qcom,sc7280-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
IPCC_MPROC_SIGNAL_GLINK_QMP
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 2700a8145cb9..90a4c09e67f1 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3710,7 +3710,7 @@ pdc: interrupt-controller@b220000 {
};
aoss_qmp: power-controller@c300000 {
- compatible = "qcom,sm8150-aoss-qmp";
+ compatible = "qcom,sm8150-aoss-qmp", "qcom,aoss-qmp";
reg = <0x0 0x0c300000 0x0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 0>;
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index dc2562070336..881550cf7557 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3726,7 +3726,7 @@ tsens1: thermal-sensor@c265000 {
};
aoss_qmp: power-controller@c300000 {
- compatible = "qcom,sm8250-aoss-qmp";
+ compatible = "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
IPCC_MPROC_SIGNAL_GLINK_QMP
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c0137bdcf94b..e1eba30dc7ad 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1718,7 +1718,7 @@ tsens1: thermal-sensor@c265000 {
};
aoss_qmp: power-controller@c300000 {
- compatible = "qcom,sm8350-aoss-qmp";
+ compatible = "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp";
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
--
2.32.0
Align order of interrupts with Qualcomm DWC3 USB DT schema. No
functional impact expected.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++----
arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 ++++++----
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 5d51b6ce45ef..3eafc50b6abd 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3265,11 +3265,13 @@ usb_1: usb@a6f8800 {
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
+ <&pdc 17 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
- <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
- "dm_hs_phy_irq", "ss_phy_irq";
+ <&pdc 14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hs_phy_irq",
+ "ss_phy_irq",
+ "dm_hs_phy_irq",
+ "dp_hs_phy_irq";
power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index e8c19b37ca0e..7d08fad76371 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3122,11 +3122,13 @@ usb_1: usb@a6f8800 {
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
+ <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
- <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
- "dm_hs_phy_irq", "ss_phy_irq";
+ <&pdc 14 IRQ_TYPE_EDGE_BOTH>;
+ interrupt-names = "hs_phy_irq",
+ "ss_phy_irq",
+ "dm_hs_phy_irq",
+ "dp_hs_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
--
2.32.0
Add dedicated compatible for DWC3 USB node name to allow more accurate
DT schema matching.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index e81b2a7794fb..50def880bc87 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -481,7 +481,7 @@ sdhc_2: sdhci@4784000 {
};
usb3: usb@4ef8800 {
- compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
+ compatible = "qcom,sm6125-dwc3", "qcom,dwc3";
reg = <0x04ef8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
--
2.32.0
The bindings defined strict clocks but several variants do not use them
in such order. Split the clocks and clock-names per variants to match
current DTS usage. In few cases this might not be complete match, due
to incomplete DTS.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/usb/qcom,dwc3.yaml | 222 ++++++++++++++++--
1 file changed, 200 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 03f93f25cba4..5047ca31657c 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -54,26 +54,22 @@ properties:
maxItems: 1
clocks:
- description:
- A list of phandle and clock-specifier pairs for the clocks
- listed in clock-names.
- items:
- - description: System Config NOC clock.
- - description: Master/Core clock, has to be >= 125 MHz
- for SS operation and >= 60MHz for HS operation.
- - description: System bus AXI clock.
- - description: Mock utmi clock needed for ITP/SOF generation
- in host mode. Its frequency should be 19.2MHz.
- - description: Sleep clock, used for wakeup when
- USB3 core goes into low power mode (U3).
+ description: |
+ Several clocks are used, depending on the variant. Typical ones are::
+ - cfg_noc:: System Config NOC clock.
+ - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
+ 60MHz for HS operation.
+ - iface:: System bus AXI clock.
+ - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
+ power mode (U3).
+ - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
+ mode. Its frequency should be 19.2MHz.
+ minItems: 1
+ maxItems: 6
clock-names:
- items:
- - const: cfg_noc
- - const: core
- - const: iface
- - const: mock_utmi
- - const: sleep
+ minItems: 1
+ maxItems: 6
assigned-clocks:
items:
@@ -136,6 +132,185 @@ required:
- interrupts
- interrupt-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq4019-dwc3
+ then:
+ properties:
+ clocks:
+ maxItems: 3
+ clock-names:
+ items:
+ - const: core
+ - const: sleep
+ - const: mock_utmi
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8064-dwc3
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Master/Core clock, has to be >= 125 MHz
+ for SS operation and >= 60MHz for HS operation.
+ clock-names:
+ items:
+ - const: core
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8953-dwc3
+ - qcom,msm8996-dwc3
+ - qcom,msm8998-dwc3
+ - qcom,sc7180-dwc3
+ - qcom,sc7280-dwc3
+ - qcom,sdm845-dwc3
+ - qcom,sdx55-dwc3
+ - qcom,sm6350-dwc3
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+ clock-names:
+ items:
+ - const: cfg_noc
+ - const: core
+ - const: iface
+ - const: sleep
+ - const: mock_utmi
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq6018-dwc3
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 4
+ clock-names:
+ oneOf:
+ - items:
+ - const: core
+ - const: sleep
+ - const: mock_utmi
+ - items:
+ - const: cfg_noc
+ - const: core
+ - const: sleep
+ - const: mock_utmi
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-dwc3
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ items:
+ - const: cfg_noc
+ - const: core
+ - const: sleep
+ - const: mock_utmi
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8994-dwc3
+ - qcom,qcs404-dwc3
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ items:
+ - const: core
+ - const: iface
+ - const: sleep
+ - const: mock_utmi
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sdm660-dwc3
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ clock-names:
+ items:
+ - const: cfg_noc
+ - const: core
+ - const: iface
+ - const: sleep
+ - const: mock_utmi
+ - const: bus
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sm6125-dwc3
+ - qcom,sm8150-dwc3
+ - qcom,sm8250-dwc3
+ - qcom,sm8450-dwc3
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ clock-names:
+ items:
+ - const: cfg_noc
+ - const: core
+ - const: iface
+ - const: sleep
+ - const: mock_utmi
+ - const: xo
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sm8350-dwc3
+ then:
+ properties:
+ clocks:
+ minItems: 5
+ maxItems: 6
+ clock-names:
+ minItems: 5
+ items:
+ - const: cfg_noc
+ - const: core
+ - const: iface
+ - const: sleep
+ - const: mock_utmi
+ - const: xo
+
+
additionalProperties: false
examples:
@@ -157,10 +332,13 @@ examples:
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_PRIM_SLEEP_CLK>;
- clock-names = "cfg_noc", "core", "iface", "mock_utmi",
- "sleep";
+ <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+ <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
+ clock-names = "cfg_noc",
+ "core",
+ "iface",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
--
2.32.0
Add dedicated compatible for DWC3 USB node name to allow more accurate
DT schema matching.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 519938530c35..253fde08db44 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -553,7 +553,7 @@ qpic_nand: nand@79b0000 {
};
usb_0: usb@8af8800 {
- compatible = "qcom,dwc3";
+ compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
@@ -593,7 +593,7 @@ dwc_0: usb@8a00000 {
};
usb_1: usb@8cf8800 {
- compatible = "qcom,dwc3";
+ compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
reg = <0x08cf8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
--
2.32.0
Align DWC3 USB node names with DT schema ("usb" is expected) and correct
the unit addresses to match the "reg" property. This also implies
overriding nodes by label, instead of full path.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 18 ++++++++---------
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 20 +++++++++----------
arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 ++++---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
11 files changed, 37 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts
index 56e54ce4d10e..49afbb1a066a 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts
@@ -1052,22 +1052,22 @@ &ufshc {
&usb2 {
status = "okay";
extcon = <&usb2_id>;
+};
- dwc3@7600000 {
- extcon = <&usb2_id>;
- dr_mode = "otg";
- maximum-speed = "high-speed";
- };
+&usb2_dwc3 {
+ extcon = <&usb2_id>;
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
};
&usb3 {
status = "okay";
extcon = <&usb3_id>;
+};
- dwc3@6a00000 {
- extcon = <&usb3_id>;
- dr_mode = "otg";
- };
+&usb3_dwc3 {
+ extcon = <&usb3_id>;
+ dr_mode = "otg";
};
&usb3phy {
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a4d363c187fc..835de9834833 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -653,7 +653,7 @@ qusb_phy_1: qusb@59000 {
status = "disabled";
};
- usb2: usb2@7000000 {
+ usb2: usb@70f8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x070F8800 0x0 0x400>;
#address-cells = <2>;
@@ -730,7 +730,7 @@ qusb_phy_0: qusb@79000 {
status = "disabled";
};
- usb3: usb3@8A00000 {
+ usb3: usb@8af8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x8AF8800 0x0 0x400>;
#address-cells = <2>;
@@ -756,7 +756,7 @@ usb3: usb3@8A00000 {
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
- dwc_0: usb@8A00000 {
+ dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x0 0x8A00000 0x0 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 943243d5515b..519938530c35 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -578,7 +578,7 @@ usb_0: usb@8af8800 {
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
- dwc_0: dwc3@8a00000 {
+ dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
@@ -618,7 +618,7 @@ usb_1: usb@8cf8800 {
resets = <&gcc GCC_USB1_BCR>;
status = "disabled";
- dwc_1: dwc3@8c00000 {
+ dwc_1: usb@8c00000 {
compatible = "snps,dwc3";
reg = <0x8c00000 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
index be4f643b1fd1..a7090befc16f 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
@@ -308,19 +308,19 @@ &usb3 {
extcon = <&typec>;
qcom,select-utmi-as-pipe-clk;
+};
- dwc3@6a00000 {
- extcon = <&typec>;
+&usb3_dwc3 {
+ extcon = <&typec>;
- /* usb3-phy is not used on this device */
- phys = <&hsusb_phy1>;
- phy-names = "usb2-phy";
+ /* usb3-phy is not used on this device */
+ phys = <&hsusb_phy1>;
+ phy-names = "usb2-phy";
- maximum-speed = "high-speed";
- snps,is-utmi-l1-suspend;
- snps,usb2-gadget-lpm-disable;
- snps,hird-threshold = /bits/ 8 <0>;
- };
+ maximum-speed = "high-speed";
+ snps,is-utmi-l1-suspend;
+ snps,usb2-gadget-lpm-disable;
+ snps,hird-threshold = /bits/ 8 <0>;
};
&hsusb_phy1 {
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 205af7b479a8..fc2e026d4c07 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -2731,7 +2731,7 @@ usb3: usb@6af8800 {
power-domains = <&gcc USB30_GDSC>;
status = "disabled";
- usb3_dwc3: dwc3@6a00000 {
+ usb3_dwc3: usb@6a00000 {
compatible = "snps,dwc3";
reg = <0x06a00000 0xcc00>;
interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
@@ -3059,7 +3059,7 @@ usb2: usb@76f8800 {
qcom,select-utmi-as-pipe-clk;
status = "disabled";
- dwc3@7600000 {
+ usb2_dwc3: usb@7600000 {
compatible = "snps,dwc3";
reg = <0x07600000 0xcc00>;
interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 4a84de6cee1e..0200d532b531 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2040,7 +2040,7 @@ usb3: usb@a8f8800 {
resets = <&gcc GCC_USB_30_BCR>;
- usb3_dwc3: dwc3@a800000 {
+ usb3_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0x0a800000 0xcd00>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index a80c578484ba..2f3104a84417 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -337,9 +337,10 @@ &usb2_phy_sec {
&usb3 {
status = "okay";
- dwc3@7580000 {
- dr_mode = "host";
- };
+};
+
+&usb3_dwc3 {
+ dr_mode = "host";
};
&usb2_phy_prim {
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index bc446c6002d0..568821259f11 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -544,7 +544,7 @@ usb3: usb@7678800 {
assigned-clock-rates = <19200000>, <200000000>;
status = "disabled";
- dwc3@7580000 {
+ usb3_dwc3: usb@7580000 {
compatible = "snps,dwc3";
reg = <0x07580000 0xcd00>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
@@ -573,7 +573,7 @@ usb2: usb@79b8800 {
assigned-clock-rates = <19200000>, <133333333>;
status = "disabled";
- dwc3@78c0000 {
+ usb@78c0000 {
compatible = "snps,dwc3";
reg = <0x078c0000 0xcc00>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 925340fbbb59..e9f834361660 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2786,7 +2786,7 @@ usb_1: usb@a6f8800 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>;
interconnect-names = "usb-ddr", "apps-usb";
- usb_1_dwc3: dwc3@a600000 {
+ usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xe000>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 692cf4be4eef..6af80a627c3a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3868,7 +3868,7 @@ usb_1: usb@a6f8800 {
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
- usb_1_dwc3: dwc3@a600000 {
+ usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
@@ -3916,7 +3916,7 @@ usb_2: usb@a8f8800 {
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
interconnect-names = "usb-ddr", "apps-usb";
- usb_2_dwc3: dwc3@a800000 {
+ usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 90a4c09e67f1..a57a13486c6c 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3635,7 +3635,7 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
- usb_1_dwc3: dwc3@a600000 {
+ usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
--
2.32.0
Document power-controller child of Qualcomm RPM over SMD to fix
dtbs_check warnings like:
msm8916-huawei-g7.dtb: rpm-requests: 'power-controller' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
index f0f1bf06aea6..cc1b35080162 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
@@ -51,6 +51,9 @@ properties:
$ref: /schemas/clock/qcom,rpmcc.yaml#
unevaluatedProperties: false
+ power-controller:
+ $ref: /schemas/power/qcom,rpmpd.yaml#
+
qcom,smd-channels:
$ref: /schemas/types.yaml#/definitions/string-array
description: Channel name used for the RPM communication
--
2.32.0
On Wed, 04 May 2022 15:19:14 +0200, Krzysztof Kozlowski wrote:
> The bindings defined strict clocks but several variants do not use them
> in such order. Split the clocks and clock-names per variants to match
> current DTS usage. In few cases this might not be complete match, due
> to incomplete DTS.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/usb/qcom,dwc3.yaml | 222 ++++++++++++++++--
> 1 file changed, 200 insertions(+), 22 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Wed, 04 May 2022 15:19:12 +0200, Krzysztof Kozlowski wrote:
> Document power-controller child of Qualcomm RPM over SMD to fix
> dtbs_check warnings like:
>
> msm8916-huawei-g7.dtb: rpm-requests: 'power-controller' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Wed, 04 May 2022 15:19:11 +0200, Krzysztof Kozlowski wrote:
> Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a
> fallback. This fixes dtbs_check warnings like:
>
> sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss-qmp' is not one of
> ['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp', 'qcom,sdm845-aoss-qmp',
> 'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp', 'qcom,sm8350-aoss-qmp']
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <[email protected]>
On Wed, May 4, 2022 at 5:13 PM Krzysztof Kozlowski
<[email protected]> wrote:
> The patches are independent, so they can be picked up as is (or everything
> through Qualcomm SoC tree).
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (13):
> dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
> dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
> dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125
> dt-bindings: usb: qcom,dwc3: fix clock matching
> arm64: dts: qcom: add missing AOSS QMP compatible fallback
> arm64: dts: qcom: correct DWC3 node names and unit addresses
> arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
> arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
> arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
> arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
> arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
> arm64: dts: qcom: align DWC3 USB clocks with DT schema
> arm64: dts: qcom: align DWC3 USB interrupts with DT schema
Looks like all but the first two were applied to usb-next by Greg,
causing conflicts with the soc/for-next tree.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On 17/05/2022 11:19, Geert Uytterhoeven wrote:
> On Wed, May 4, 2022 at 5:13 PM Krzysztof Kozlowski
> <[email protected]> wrote:
>> The patches are independent, so they can be picked up as is (or everything
>> through Qualcomm SoC tree).
>>
>> Best regards,
>> Krzysztof
>>
>> Krzysztof Kozlowski (13):
>> dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
>> dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
>> dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125
>> dt-bindings: usb: qcom,dwc3: fix clock matching
>> arm64: dts: qcom: add missing AOSS QMP compatible fallback
>> arm64: dts: qcom: correct DWC3 node names and unit addresses
>> arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
>> arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
>> arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
>> arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
>> arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
>> arm64: dts: qcom: align DWC3 USB clocks with DT schema
>> arm64: dts: qcom: align DWC3 USB interrupts with DT schema
>
> Looks like all but the first two were applied to usb-next by Greg,
> causing conflicts with the soc/for-next tree.
Also this one was not applied:
arm64: dts: qcom: add missing AOSS QMP compatible fallback
However I did not get any conflict message...
The DTS patches should not go via Greg's tree. They are sent together so
there will be no warnings from Rob's bot. This is a common practice for
dt-binding fixes.
Bjorn,
Any preference from you? Shall I send missing three patches to you?
What about conflicts with Greg's tree?
Best regards,
Krzysztof
On 17/05/2022 11:57, Greg Kroah-Hartman wrote:
> On Tue, May 17, 2022 at 11:27:39AM +0200, Krzysztof Kozlowski wrote:
>> On 17/05/2022 11:19, Geert Uytterhoeven wrote:
>>> On Wed, May 4, 2022 at 5:13 PM Krzysztof Kozlowski
>>> <[email protected]> wrote:
>>>> The patches are independent, so they can be picked up as is (or everything
>>>> through Qualcomm SoC tree).
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>>> Krzysztof Kozlowski (13):
>>>> dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
>>>> dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
>>>> dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125
>>>> dt-bindings: usb: qcom,dwc3: fix clock matching
>>>> arm64: dts: qcom: add missing AOSS QMP compatible fallback
>>>> arm64: dts: qcom: correct DWC3 node names and unit addresses
>>>> arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
>>>> arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
>>>> arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
>>>> arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
>>>> arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
>>>> arm64: dts: qcom: align DWC3 USB clocks with DT schema
>>>> arm64: dts: qcom: align DWC3 USB interrupts with DT schema
>>>
>>> Looks like all but the first two were applied to usb-next by Greg,
>>> causing conflicts with the soc/for-next tree.
>>
>> Also this one was not applied:
>> arm64: dts: qcom: add missing AOSS QMP compatible fallback
>>
>> However I did not get any conflict message...
>>
>> The DTS patches should not go via Greg's tree. They are sent together so
>> there will be no warnings from Rob's bot. This is a common practice for
>> dt-binding fixes.
>>
>> Bjorn,
>> Any preference from you? Shall I send missing three patches to you?
>>
>> What about conflicts with Greg's tree?
>
> If I need to revert anything from my tree, please let me know. Trying
> to figure out who should, and should not, take patches like this is
> driving me crazy...
Sorry for the confusion Greg. I marked preferred merging strategy in the
cover letter. I am trying to sort it out with Bjorn. The conflict will
hit later Linus and it is auto-solvable with decent mergetool, but for a
human's eye it is a confusing diff.
Some more background:
Patches marked with "dts" prefix should always go via respective arm-soc
maintainer, not only to reduce conflicts, but also to keep hardware
description (Devicetree sources, DTS) separate from implementation.
Otherwise some folks like to combine ABI-breaking changes in drivers
together with DTS patches, so from the kernel perspective it looks like
there is no ABI breakage. But there is, just not directly visible.
Therefore arm-soc folks always insist on having DTS changes in separate
branches, so this split driver-DTS is clear.
Best regards,
Krzysztof
On Wed, 4 May 2022 15:19:11 +0200, Krzysztof Kozlowski wrote:
> Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a
> fallback. This fixes dtbs_check warnings like:
>
> sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss-qmp' is not one of
> ['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp', 'qcom,sdm845-aoss-qmp',
> 'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp', 'qcom,sm8350-aoss-qmp']
>
> [...]
Applied, thanks!
[01/13] dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
https://git.kernel.org/krzk/linux-dt/c/cd3cd7d63543e4f963a0c823cd8fa29f4fe12f2a
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Wed, 4 May 2022 15:19:12 +0200, Krzysztof Kozlowski wrote:
> Document power-controller child of Qualcomm RPM over SMD to fix
> dtbs_check warnings like:
>
> msm8916-huawei-g7.dtb: rpm-requests: 'power-controller' do not match any of the regexes: 'pinctrl-[0-9]+'
>
>
Applied, thanks!
[02/13] dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
https://git.kernel.org/krzk/linux-dt/c/5f85744976959a99a76b5c7acff093b65414a606
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Wed, 4 May 2022 15:19:15 +0200, Krzysztof Kozlowski wrote:
> The AOSS QMP bindings expect all compatibles to be followed by fallback
> "qcom,aoss-qmp" because all of these are actually compatible with each
> other. This fixes dtbs_check warnings like:
>
> sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-qmp'] is too short
>
>
> [...]
Applied, thanks!
[05/13] arm64: dts: qcom: add missing AOSS QMP compatible fallback
https://git.kernel.org/krzk/linux/c/9a2f272b5f665ac945bc06f7b2e7cdf1cd974cce
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Wed 04 May 08:19 CDT 2022, Krzysztof Kozlowski wrote:
[..]
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 692cf4be4eef..6af80a627c3a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -3868,7 +3868,7 @@ usb_1: usb@a6f8800 {
> <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
> interconnect-names = "usb-ddr", "apps-usb";
>
> - usb_1_dwc3: dwc3@a600000 {
> + usb_1_dwc3: usb@a600000 {
Linux uses the dev_name() when identifying each of these controllers in
/sys/class/UDC, as such changing the name here will break existing USB
ConfigFS Gadget users.
We had this fixed for a while, but where forced to revert it.
So I think, in order for us to merge this without breaking AOSP, we'd
need to come up with a way to retain the old UDC name (perhaps a label
property?)
Regards,
Bjorn
On 30/06/2022 05:30, Bjorn Andersson wrote:
> On Wed 04 May 08:19 CDT 2022, Krzysztof Kozlowski wrote:
> [..]
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> index 692cf4be4eef..6af80a627c3a 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> @@ -3868,7 +3868,7 @@ usb_1: usb@a6f8800 {
>> <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
>> interconnect-names = "usb-ddr", "apps-usb";
>>
>> - usb_1_dwc3: dwc3@a600000 {
>> + usb_1_dwc3: usb@a600000 {
>
> Linux uses the dev_name() when identifying each of these controllers in
> /sys/class/UDC, as such changing the name here will break existing USB
> ConfigFS Gadget users.
>
> We had this fixed for a while, but where forced to revert it.
>
>
> So I think, in order for us to merge this without breaking AOSP, we'd
> need to come up with a way to retain the old UDC name (perhaps a label
> property?)
Ugh, I thought this was long time solved [1][2] and allowed to merge
most of [3] to get merged.
[1]
https://lore.kernel.org/all/CALAqxLWGujgR7p8Vb5S_RimRVYxwm5XF-c4NkKgMH-43wEBaWg@mail.gmail.com/
[2]
https://lore.kernel.org/linux-usb/CALAqxLXrs0_Xs0JV5H-wS1q2CJ7XhW5Dj90eu=uazkRXXEMUxQ@mail.gmail.com/
[3]
https://lore.kernel.org/all/[email protected]/
Best regards,
Krzysztof
On Wed, 4 May 2022 15:19:10 +0200, Krzysztof Kozlowski wrote:
> The patches are independent, so they can be picked up as is (or everything
> through Qualcomm SoC tree).
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (13):
> dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp
> dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller
> dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125
> dt-bindings: usb: qcom,dwc3: fix clock matching
> arm64: dts: qcom: add missing AOSS QMP compatible fallback
> arm64: dts: qcom: correct DWC3 node names and unit addresses
> arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
> arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
> arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
> arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
> arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
> arm64: dts: qcom: align DWC3 USB clocks with DT schema
> arm64: dts: qcom: align DWC3 USB interrupts with DT schema
>
> [...]
Applied, thanks!
[05/13] arm64: dts: qcom: add missing AOSS QMP compatible fallback
commit: 6ba93ba9f63fbc44c3a6af7fe6f2536d009cfd5a
[07/13] arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible
(no commit info)
[08/13] arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible
(no commit info)
[09/13] arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible
(no commit info)
[10/13] arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible
(no commit info)
[11/13] arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node
(no commit info)
[12/13] arm64: dts: qcom: align DWC3 USB clocks with DT schema
(no commit info)
[13/13] arm64: dts: qcom: align DWC3 USB interrupts with DT schema
(no commit info)
Best regards,
--
Bjorn Andersson <[email protected]>