RGMII mode can be enable from dp83822 straps, and also writing bit 9
of register 0x17 - RMII and Status Register (RCSR).
When phy_interface_is_rgmii rgmii mode must be enabled, same for
contrary, this prevents malconfigurations of hw straps
References:
- https://www.ti.com/lit/gpn/dp83822i p66
Signed-off-by: Tommaso Merciai <[email protected]>
Co-developed-by: Michael Trimarchi <[email protected]>
Suggested-by: Alberto Bianchi <[email protected]>
Tested-by: Tommaso Merciai <[email protected]>
---
Changes since v2:
- Fix comment of register name RSCR -> RCSR
- Fix define DP83822_RGMII_MODE_EN location
Changes since v1:
- Improve commit msg
- Add definition of bit 9 reg rcsr (rgmii mode en)
- Handle case: phy_interface_is_rgmii is false
drivers/net/phy/dp83822.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
index ce17b2af3218..e6ad3a494d32 100644
--- a/drivers/net/phy/dp83822.c
+++ b/drivers/net/phy/dp83822.c
@@ -94,7 +94,8 @@
#define DP83822_WOL_INDICATION_SEL BIT(8)
#define DP83822_WOL_CLR_INDICATION BIT(11)
-/* RSCR bits */
+/* RCSR bits */
+#define DP83822_RGMII_MODE_EN BIT(9)
#define DP83822_RX_CLK_SHIFT BIT(12)
#define DP83822_TX_CLK_SHIFT BIT(11)
@@ -408,6 +409,12 @@ static int dp83822_config_init(struct phy_device *phydev)
if (err)
return err;
}
+
+ phy_set_bits_mmd(phydev, DP83822_DEVADDR,
+ MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);
+ } else {
+ phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
+ MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);
}
if (dp83822->fx_enabled) {
--
2.25.1
On Sat, May 21, 2022 at 01:58:46AM +0200, Tommaso Merciai wrote:
> RGMII mode can be enable from dp83822 straps, and also writing bit 9
> of register 0x17 - RMII and Status Register (RCSR).
> When phy_interface_is_rgmii rgmii mode must be enabled, same for
> contrary, this prevents malconfigurations of hw straps
>
> References:
> - https://www.ti.com/lit/gpn/dp83822i p66
>
> Signed-off-by: Tommaso Merciai <[email protected]>
> Co-developed-by: Michael Trimarchi <[email protected]>
> Suggested-by: Alberto Bianchi <[email protected]>
> Tested-by: Tommaso Merciai <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
If you want to, you could go further. If bit 9 is clear, bit 5 defines
the mode, either RMII or MII. There are interface modes defined for
these, so you could get bit 5 as well.
Andrew
Hello:
This patch was applied to netdev/net-next.git (master)
by David S. Miller <[email protected]>:
On Sat, 21 May 2022 01:58:46 +0200 you wrote:
> RGMII mode can be enable from dp83822 straps, and also writing bit 9
> of register 0x17 - RMII and Status Register (RCSR).
> When phy_interface_is_rgmii rgmii mode must be enabled, same for
> contrary, this prevents malconfigurations of hw straps
>
> References:
> - https://www.ti.com/lit/gpn/dp83822i p66
>
> [...]
Here is the summary with links:
- [v3] net: phy: DP83822: enable rgmii mode if phy_interface_is_rgmii
https://git.kernel.org/netdev/net-next/c/621427fbdada
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
On Sat, May 21, 2022 at 08:39:02PM +0200, Andrew Lunn wrote:
> On Sat, May 21, 2022 at 01:58:46AM +0200, Tommaso Merciai wrote:
> > RGMII mode can be enable from dp83822 straps, and also writing bit 9
> > of register 0x17 - RMII and Status Register (RCSR).
> > When phy_interface_is_rgmii rgmii mode must be enabled, same for
> > contrary, this prevents malconfigurations of hw straps
> >
> > References:
> > - https://www.ti.com/lit/gpn/dp83822i p66
> >
> > Signed-off-by: Tommaso Merciai <[email protected]>
> > Co-developed-by: Michael Trimarchi <[email protected]>
> > Suggested-by: Alberto Bianchi <[email protected]>
> > Tested-by: Tommaso Merciai <[email protected]>
>
> Reviewed-by: Andrew Lunn <[email protected]>
>
> If you want to, you could go further. If bit 9 is clear, bit 5 defines
> the mode, either RMII or MII. There are interface modes defined for
> these, so you could get bit 5 as well.
Hi Andrew,
Thanks for the review and for your time.
I'll try to go further, like you suggest :)
Regards,
Tommaso
>
> Andrew
--
Tommaso Merciai
Embedded Linux Engineer
[email protected]
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
[email protected]
http://www.amarulasolutions.com
On Mon, May 23, 2022 at 08:57:54AM +0200, Tommaso Merciai wrote:
> On Sat, May 21, 2022 at 08:39:02PM +0200, Andrew Lunn wrote:
> > On Sat, May 21, 2022 at 01:58:46AM +0200, Tommaso Merciai wrote:
> > > RGMII mode can be enable from dp83822 straps, and also writing bit 9
> > > of register 0x17 - RMII and Status Register (RCSR).
> > > When phy_interface_is_rgmii rgmii mode must be enabled, same for
> > > contrary, this prevents malconfigurations of hw straps
> > >
> > > References:
> > > - https://www.ti.com/lit/gpn/dp83822i p66
> > >
> > > Signed-off-by: Tommaso Merciai <[email protected]>
> > > Co-developed-by: Michael Trimarchi <[email protected]>
> > > Suggested-by: Alberto Bianchi <[email protected]>
> > > Tested-by: Tommaso Merciai <[email protected]>
> >
> > Reviewed-by: Andrew Lunn <[email protected]>
> >
> > If you want to, you could go further. If bit 9 is clear, bit 5 defines
> > the mode, either RMII or MII. There are interface modes defined for
> > these, so you could get bit 5 as well.
>
> Hi Andrew,
> Thanks for the review and for your time.
> I'll try to go further, like you suggest :)
Hi Tomaso
This patch has been accepted, so you will need to submit an
incremental patch. I also expect net-next to close soon for the merge
window, so you might want to wait two weeks before submitting.
Andrew
On Mon, May 23, 2022 at 02:16:56PM +0200, Andrew Lunn wrote:
> On Mon, May 23, 2022 at 08:57:54AM +0200, Tommaso Merciai wrote:
> > On Sat, May 21, 2022 at 08:39:02PM +0200, Andrew Lunn wrote:
> > > On Sat, May 21, 2022 at 01:58:46AM +0200, Tommaso Merciai wrote:
> > > > RGMII mode can be enable from dp83822 straps, and also writing bit 9
> > > > of register 0x17 - RMII and Status Register (RCSR).
> > > > When phy_interface_is_rgmii rgmii mode must be enabled, same for
> > > > contrary, this prevents malconfigurations of hw straps
> > > >
> > > > References:
> > > > - https://www.ti.com/lit/gpn/dp83822i p66
> > > >
> > > > Signed-off-by: Tommaso Merciai <[email protected]>
> > > > Co-developed-by: Michael Trimarchi <[email protected]>
> > > > Suggested-by: Alberto Bianchi <[email protected]>
> > > > Tested-by: Tommaso Merciai <[email protected]>
> > >
> > > Reviewed-by: Andrew Lunn <[email protected]>
> > >
> > > If you want to, you could go further. If bit 9 is clear, bit 5 defines
> > > the mode, either RMII or MII. There are interface modes defined for
> > > these, so you could get bit 5 as well.
> >
> > Hi Andrew,
> > Thanks for the review and for your time.
> > I'll try to go further, like you suggest :)
>
> Hi Tomaso
>
> This patch has been accepted, so you will need to submit an
> incremental patch. I also expect net-next to close soon for the merge
> window, so you might want to wait two weeks before submitting.
>
> Andrew
Hi Andrew,
Thanks for the info. I'll wait for the close of the merge window
then.
Regards,
Tommaso
--
Tommaso Merciai
Embedded Linux Engineer
[email protected]
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
[email protected]
http://www.amarulasolutions.com