tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-5.15.y
head: a9e2d8e52e1c0d87c0fa4f9d2d38e210aabed515
commit: e16cc79b0f916069de223bdb567fa0bc2ccd18a5 [6874/8723] lib/crypto: add prompts back to crypto libraries
config: arm-buildonly-randconfig-r006-20220724 (https://download.01.org/0day-ci/archive/20220725/[email protected]/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 12fbd2d377e396ad61bce56d71c98a1eb1bebfa9)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/commit/?id=e16cc79b0f916069de223bdb567fa0bc2ccd18a5
git remote add linux-stable-rc https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git fetch --no-tags linux-stable-rc linux-5.15.y
git checkout e16cc79b0f916069de223bdb567fa0bc2ccd18a5
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <[email protected]>
All warnings (new ones prefixed by >>):
>> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
#warning This code requires at least version 4.6 of GCC
^
1 warning generated.
vim +30 arch/arm/lib/xor-neon.c
01956597cbc46d Ard Biesheuvel 2013-05-17 16
01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
01956597cbc46d Ard Biesheuvel 2013-05-17 32
:::::: The code at line 30 was first introduced by commit
:::::: 01956597cbc46df072f20f90a40eebe356200c38 ARM: crypto: add NEON accelerated XOR implementation
:::::: TO: Ard Biesheuvel <[email protected]>
:::::: CC: Ard Biesheuvel <[email protected]>
--
0-DAY CI Kernel Test Service
https://01.org/lkp
Hi Ard,
On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote:
> All warnings (new ones prefixed by >>):
>
> >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
> #warning This code requires at least version 4.6 of GCC
> ^
> 1 warning generated.
>
>
> vim +30 arch/arm/lib/xor-neon.c
>
> 01956597cbc46d Ard Biesheuvel 2013-05-17 16
> 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
> 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
> 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
> 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
> 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
> 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
> 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
> 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
> 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
> 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
> 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
> 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
> 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
> 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
> 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
> 01956597cbc46d Ard Biesheuvel 2013-05-17 32
Does this file need a depends on ≥4.6 thing in Kconfig? Or is something
else happening here since 4.6 isn't even supported by the kernel these
days?
Jason
On Mon, 25 Jul 2022 at 00:40, Jason A. Donenfeld <[email protected]> wrote:
>
> Hi Ard,
>
> On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote:
> > All warnings (new ones prefixed by >>):
> >
> > >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
> > #warning This code requires at least version 4.6 of GCC
> > ^
> > 1 warning generated.
> >
> >
> > vim +30 arch/arm/lib/xor-neon.c
> >
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 16
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
> > 01956597cbc46d Ard Biesheuvel 2013-05-17 32
>
> Does this file need a depends on ≥4.6 thing in Kconfig? Or is something
> else happening here since 4.6 isn't even supported by the kernel these
> days?
>
Hi Jason,
This is explained/fixed in
commit a69cb445f7d129abf7c50d48c8a8eca7c8d5df15
Author: Ard Biesheuvel <[email protected]>
Date: Sat Feb 5 16:23:46 2022 +0100
crypto: arm/xor - make vectorized C code Clang-friendly
The ARM version of the accelerated XOR routines are simply the 8-way C
routines passed through the auto-vectorizer with SIMD codegen enabled.
This used to require GCC version 4.6 at least, but given that 5.1 is now
the baseline, this check is no longer necessary, and actually
misidentifies Clang as GCC < 4.6 as Clang defines the GCC major/minor as
well, but makes no attempt at doing this in a way that conveys feature
parity with a certain version of GCC (which would not be a great idea in
the first place).
which landed in v5.18. Note that the patch depends on its parent,
which touches many different architectures, so it may not be
backportable cleanly.
On Mon, Jul 25, 2022 at 07:42:07AM +0200, Ard Biesheuvel wrote:
> On Mon, 25 Jul 2022 at 00:40, Jason A. Donenfeld <[email protected]> wrote:
> >
> > Hi Ard,
> >
> > On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote:
> > > All warnings (new ones prefixed by >>):
> > >
> > > >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
> > > #warning This code requires at least version 4.6 of GCC
> > > ^
> > > 1 warning generated.
> > >
> > >
> > > vim +30 arch/arm/lib/xor-neon.c
> > >
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 16
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
> > > 01956597cbc46d Ard Biesheuvel 2013-05-17 32
> >
> > Does this file need a depends on ≥4.6 thing in Kconfig? Or is something
> > else happening here since 4.6 isn't even supported by the kernel these
> > days?
> >
>
> Hi Jason,
>
> This is explained/fixed in
>
> commit a69cb445f7d129abf7c50d48c8a8eca7c8d5df15
> Author: Ard Biesheuvel <[email protected]>
> Date: Sat Feb 5 16:23:46 2022 +0100
>
> crypto: arm/xor - make vectorized C code Clang-friendly
>
> The ARM version of the accelerated XOR routines are simply the 8-way C
> routines passed through the auto-vectorizer with SIMD codegen enabled.
> This used to require GCC version 4.6 at least, but given that 5.1 is now
> the baseline, this check is no longer necessary, and actually
> misidentifies Clang as GCC < 4.6 as Clang defines the GCC major/minor as
> well, but makes no attempt at doing this in a way that conveys feature
> parity with a certain version of GCC (which would not be a great idea in
> the first place).
>
> which landed in v5.18. Note that the patch depends on its parent,
> which touches many different architectures, so it may not be
> backportable cleanly.
I would love to backport this as it bugs me to no end on some various
gerrit systems all the time. I'll look into it later this week unless
someone beats me to it :)
thanks,
greg k-h
On Mon, 25 Jul 2022 at 10:49, Greg Kroah-Hartman
<[email protected]> wrote:
>
> On Mon, Jul 25, 2022 at 07:42:07AM +0200, Ard Biesheuvel wrote:
> > On Mon, 25 Jul 2022 at 00:40, Jason A. Donenfeld <[email protected]> wrote:
> > >
> > > Hi Ard,
> > >
> > > On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote:
> > > > All warnings (new ones prefixed by >>):
> > > >
> > > > >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
> > > > #warning This code requires at least version 4.6 of GCC
> > > > ^
> > > > 1 warning generated.
> > > >
> > > >
> > > > vim +30 arch/arm/lib/xor-neon.c
> > > >
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 16
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
> > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 32
> > >
> > > Does this file need a depends on ≥4.6 thing in Kconfig? Or is something
> > > else happening here since 4.6 isn't even supported by the kernel these
> > > days?
> > >
> >
> > Hi Jason,
> >
> > This is explained/fixed in
> >
> > commit a69cb445f7d129abf7c50d48c8a8eca7c8d5df15
> > Author: Ard Biesheuvel <[email protected]>
> > Date: Sat Feb 5 16:23:46 2022 +0100
> >
> > crypto: arm/xor - make vectorized C code Clang-friendly
> >
> > The ARM version of the accelerated XOR routines are simply the 8-way C
> > routines passed through the auto-vectorizer with SIMD codegen enabled.
> > This used to require GCC version 4.6 at least, but given that 5.1 is now
> > the baseline, this check is no longer necessary, and actually
> > misidentifies Clang as GCC < 4.6 as Clang defines the GCC major/minor as
> > well, but makes no attempt at doing this in a way that conveys feature
> > parity with a certain version of GCC (which would not be a great idea in
> > the first place).
> >
> > which landed in v5.18. Note that the patch depends on its parent,
> > which touches many different architectures, so it may not be
> > backportable cleanly.
>
> I would love to backport this as it bugs me to no end on some various
> gerrit systems all the time. I'll look into it later this week unless
> someone beats me to it :)
>
If backporting is an issue, we could just drop this warning - GCC
before 4.6 hasn't been supported for a while anyway, and Clang never
had the SIMD accelerated XOR to begin with (it needs the __restrict
annotations that the parent patch introduces)
On Mon, Jul 25, 2022 at 2:41 PM Ard Biesheuvel <[email protected]> wrote:
> > I would love to backport this as it bugs me to no end on some various
> > gerrit systems all the time. I'll look into it later this week unless
> > someone beats me to it :)
> >
>
> If backporting is an issue, we could just drop this warning - GCC
> before 4.6 hasn't been supported for a while anyway, and Clang never
> had the SIMD accelerated XOR to begin with (it needs the __restrict
> annotations that the parent patch introduces)
The other easy workaround would be to just turn off the xor-neon code
when building with clang, e.g. using this Makefile hack:
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6d2ba454f25b..8e4fe6421dd2 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -43,8 +43,10 @@ endif
$(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
+ifdef CONFIG_CC_IS_CLANG
ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
CFLAGS_xor-neon.o += $(NEON_FLAGS)
obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
endif
+endif
As far as I understand it, without your patch the code is the same as the
generic version anyway, we just never turned it off in mainline this way because
the plan was always to make it work. It now does work, and for the stable
kernel the mainline patch would only be a performance optimization that we
normally don't backport.
Arnd
On Mon, Jul 25, 2022 at 02:41:42PM +0200, Ard Biesheuvel wrote:
> On Mon, 25 Jul 2022 at 10:49, Greg Kroah-Hartman
> <[email protected]> wrote:
> >
> > On Mon, Jul 25, 2022 at 07:42:07AM +0200, Ard Biesheuvel wrote:
> > > On Mon, 25 Jul 2022 at 00:40, Jason A. Donenfeld <[email protected]> wrote:
> > > >
> > > > Hi Ard,
> > > >
> > > > On Mon, Jul 25, 2022 at 04:14:48AM +0800, kernel test robot wrote:
> > > > > All warnings (new ones prefixed by >>):
> > > > >
> > > > > >> arch/arm/lib/xor-neon.c:30:2: warning: This code requires at least version 4.6 of GCC [-W#warnings]
> > > > > #warning This code requires at least version 4.6 of GCC
> > > > > ^
> > > > > 1 warning generated.
> > > > >
> > > > >
> > > > > vim +30 arch/arm/lib/xor-neon.c
> > > > >
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 16
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 17 /*
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 18 * Pull in the reference implementations while instructing GCC (through
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 19 * -ftree-vectorize) to attempt to exploit implicit parallelism and emit
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 20 * NEON instructions.
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 21 */
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 22 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6)
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 23 #pragma GCC optimize "tree-vectorize"
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 24 #else
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 25 /*
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 26 * While older versions of GCC do not generate incorrect code, they fail to
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 27 * recognize the parallel nature of these functions, and emit plain ARM code,
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 28 * which is known to be slower than the optimized ARM code in asm-arm/xor.h.
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 29 */
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 @30 #warning This code requires at least version 4.6 of GCC
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 31 #endif
> > > > > 01956597cbc46d Ard Biesheuvel 2013-05-17 32
> > > >
> > > > Does this file need a depends on ≥4.6 thing in Kconfig? Or is something
> > > > else happening here since 4.6 isn't even supported by the kernel these
> > > > days?
> > > >
> > >
> > > Hi Jason,
> > >
> > > This is explained/fixed in
> > >
> > > commit a69cb445f7d129abf7c50d48c8a8eca7c8d5df15
> > > Author: Ard Biesheuvel <[email protected]>
> > > Date: Sat Feb 5 16:23:46 2022 +0100
> > >
> > > crypto: arm/xor - make vectorized C code Clang-friendly
> > >
> > > The ARM version of the accelerated XOR routines are simply the 8-way C
> > > routines passed through the auto-vectorizer with SIMD codegen enabled.
> > > This used to require GCC version 4.6 at least, but given that 5.1 is now
> > > the baseline, this check is no longer necessary, and actually
> > > misidentifies Clang as GCC < 4.6 as Clang defines the GCC major/minor as
> > > well, but makes no attempt at doing this in a way that conveys feature
> > > parity with a certain version of GCC (which would not be a great idea in
> > > the first place).
> > >
> > > which landed in v5.18. Note that the patch depends on its parent,
> > > which touches many different architectures, so it may not be
> > > backportable cleanly.
> >
> > I would love to backport this as it bugs me to no end on some various
> > gerrit systems all the time. I'll look into it later this week unless
> > someone beats me to it :)
> >
>
> If backporting is an issue, we could just drop this warning - GCC
> before 4.6 hasn't been supported for a while anyway, and Clang never
> had the SIMD accelerated XOR to begin with (it needs the __restrict
> annotations that the parent patch introduces)
I would love to drop the warning, as it triggers when clang tries to
build this file.
thanks,
greg k-h
On Mon, Jul 25, 2022 at 2:55 PM Arnd Bergmann <[email protected]> wrote:
> The other easy workaround would be to just turn off the xor-neon code
> when building with clang, e.g. using this Makefile hack:
>
> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> index 6d2ba454f25b..8e4fe6421dd2 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -43,8 +43,10 @@ endif
> $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
> $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
>
> +ifdef CONFIG_CC_IS_CLANG
> ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
> NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
> CFLAGS_xor-neon.o += $(NEON_FLAGS)
> obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
> endif
> +endif
Nevermind, this does not actually work. Just turning off the warning
is probably best then, as actually disabling this code would still
be invasive not do much beyond saving a little bit of kernel .text size.
Arnd
On Mon, Jul 25, 2022 at 04:35:38PM +0200, Arnd Bergmann wrote:
> On Mon, Jul 25, 2022 at 2:55 PM Arnd Bergmann <[email protected]> wrote:
>
> > The other easy workaround would be to just turn off the xor-neon code
> > when building with clang, e.g. using this Makefile hack:
> >
> > diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> > index 6d2ba454f25b..8e4fe6421dd2 100644
> > --- a/arch/arm/lib/Makefile
> > +++ b/arch/arm/lib/Makefile
> > @@ -43,8 +43,10 @@ endif
> > $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
> > $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
> >
> > +ifdef CONFIG_CC_IS_CLANG
> > ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
> > NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
> > CFLAGS_xor-neon.o += $(NEON_FLAGS)
> > obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
> > endif
> > +endif
>
> Nevermind, this does not actually work. Just turning off the warning
> is probably best then, as actually disabling this code would still
> be invasive not do much beyond saving a little bit of kernel .text size.
Ok, if it triggers again, and I get annoyed, I'll write a patch,
otherwise I'll just leave it alone unless someone else wants to send it
to me...
thanks,
greg k-h
On Sat, Jul 30, 2022 at 04:33:28PM +0200, Greg Kroah-Hartman wrote:
> On Mon, Jul 25, 2022 at 04:35:38PM +0200, Arnd Bergmann wrote:
> > On Mon, Jul 25, 2022 at 2:55 PM Arnd Bergmann <[email protected]> wrote:
> >
> > > The other easy workaround would be to just turn off the xor-neon code
> > > when building with clang, e.g. using this Makefile hack:
> > >
> > > diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> > > index 6d2ba454f25b..8e4fe6421dd2 100644
> > > --- a/arch/arm/lib/Makefile
> > > +++ b/arch/arm/lib/Makefile
> > > @@ -43,8 +43,10 @@ endif
> > > $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
> > > $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
> > >
> > > +ifdef CONFIG_CC_IS_CLANG
> > > ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
> > > NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
> > > CFLAGS_xor-neon.o += $(NEON_FLAGS)
> > > obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
> > > endif
> > > +endif
> >
> > Nevermind, this does not actually work. Just turning off the warning
> > is probably best then, as actually disabling this code would still
> > be invasive not do much beyond saving a little bit of kernel .text size.
>
> Ok, if it triggers again, and I get annoyed, I'll write a patch,
> otherwise I'll just leave it alone unless someone else wants to send it
> to me...
The patch is trivial, if your idea is just to remove the #warning,
right? Might as well just do it now and get it over with.
Jason
On Sun, Jul 31, 2022 at 01:15:59AM +0200, Jason A. Donenfeld wrote:
> On Sat, Jul 30, 2022 at 04:33:28PM +0200, Greg Kroah-Hartman wrote:
> > On Mon, Jul 25, 2022 at 04:35:38PM +0200, Arnd Bergmann wrote:
> > > On Mon, Jul 25, 2022 at 2:55 PM Arnd Bergmann <[email protected]> wrote:
> > >
> > > > The other easy workaround would be to just turn off the xor-neon code
> > > > when building with clang, e.g. using this Makefile hack:
> > > >
> > > > diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> > > > index 6d2ba454f25b..8e4fe6421dd2 100644
> > > > --- a/arch/arm/lib/Makefile
> > > > +++ b/arch/arm/lib/Makefile
> > > > @@ -43,8 +43,10 @@ endif
> > > > $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
> > > > $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
> > > >
> > > > +ifdef CONFIG_CC_IS_CLANG
> > > > ifeq ($(CONFIG_KERNEL_MODE_NEON),y)
> > > > NEON_FLAGS := -march=armv7-a -mfloat-abi=softfp -mfpu=neon
> > > > CFLAGS_xor-neon.o += $(NEON_FLAGS)
> > > > obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
> > > > endif
> > > > +endif
> > >
> > > Nevermind, this does not actually work. Just turning off the warning
> > > is probably best then, as actually disabling this code would still
> > > be invasive not do much beyond saving a little bit of kernel .text size.
> >
> > Ok, if it triggers again, and I get annoyed, I'll write a patch,
> > otherwise I'll just leave it alone unless someone else wants to send it
> > to me...
>
> The patch is trivial, if your idea is just to remove the #warning,
> right? Might as well just do it now and get it over with.
Fine, I was being lazy :)
Now sent out:
https://lore.kernel.org/all/[email protected]/