2023-06-27 20:04:47

by Luca Weiss

[permalink] [raw]
Subject: [PATCH 0/2] Small style fixes in msm8974.dtsi

While making sure the nodes are sorted correctly, I also noticed that
some lines are wrongly indented. Fix both.

Signed-off-by: Luca Weiss <[email protected]>
---
Luca Weiss (2):
ARM: dts: qcom: msm8974: replace incorrect indentation in interconnect
ARM: dts: qcom: msm8974: sort nodes by reg

arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 80 ++++++++++++++++----------------
1 file changed, 40 insertions(+), 40 deletions(-)
---
base-commit: 53cdf865f90ba922a854c65ed05b519f9d728424
change-id: 20230627-msm8974-sort-e34b28f10a34

Best regards,
--
Luca Weiss <[email protected]>



2023-06-27 20:07:26

by Luca Weiss

[permalink] [raw]
Subject: [PATCH 2/2] ARM: dts: qcom: msm8974: sort nodes by reg

Some nodes weren't sorted by reg, so fix that now. Now all nodes inside
/soc should be sorted correctly.

Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 70 ++++++++++++++++----------------
1 file changed, 35 insertions(+), 35 deletions(-)

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
index c6475837eda3..9aa8f9a273a8 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
@@ -334,6 +334,12 @@ apcs: syscon@f9011000 {
reg = <0xf9011000 0x1000>;
};

+ saw_l2: power-controller@f9012000 {
+ compatible = "qcom,saw2";
+ reg = <0xf9012000 0x1000>;
+ regulator;
+ };
+
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -393,52 +399,46 @@ frame@f9028000 {
};
};

- saw0: power-controller@f9089000 {
- compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
- reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
- };
-
- saw1: power-controller@f9099000 {
- compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
- reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
- };
-
- saw2: power-controller@f90a9000 {
- compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
- reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
- };
-
- saw3: power-controller@f90b9000 {
- compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
- reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
- };
-
- saw_l2: power-controller@f9012000 {
- compatible = "qcom,saw2";
- reg = <0xf9012000 0x1000>;
- regulator;
- };
-
acc0: power-manager@f9088000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
};

+ saw0: power-controller@f9089000 {
+ compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
+ };
+
acc1: power-manager@f9098000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
};

+ saw1: power-controller@f9099000 {
+ compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
+ };
+
acc2: power-manager@f90a8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
};

+ saw2: power-controller@f90a9000 {
+ compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
+ };
+
acc3: power-manager@f90b8000 {
compatible = "qcom,kpss-acc-v2";
reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
};

+ saw3: power-controller@f90b9000 {
+ compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
+ };
+
sdhc_1: mmc@f9824900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
@@ -1051,6 +1051,15 @@ kpss_out: endpoint {
};
};

+ bimc: interconnect@fc380000 {
+ reg = <0xfc380000 0x6a000>;
+ compatible = "qcom,msm8974-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+ <&rpmcc RPM_SMD_BIMC_A_CLK>;
+ };
+
gcc: clock-controller@fc400000 {
compatible = "qcom,gcc-msm8974";
#clock-cells = <1>;
@@ -1069,15 +1078,6 @@ rpm_msg_ram: sram@fc428000 {
reg = <0xfc428000 0x4000>;
};

- bimc: interconnect@fc380000 {
- reg = <0xfc380000 0x6a000>;
- compatible = "qcom,msm8974-bimc";
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
- <&rpmcc RPM_SMD_BIMC_A_CLK>;
- };
-
snoc: interconnect@fc460000 {
reg = <0xfc460000 0x4000>;
compatible = "qcom,msm8974-snoc";

--
2.41.0


2023-06-27 20:54:38

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH 2/2] ARM: dts: qcom: msm8974: sort nodes by reg

On 27.06.2023 21:45, Luca Weiss wrote:
> Some nodes weren't sorted by reg, so fix that now. Now all nodes inside
> /soc should be sorted correctly.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
might conflict with Dmitry's SAW/SPM changes

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#maf3c226ca76f1dee37464c465c2429d9bb1dcbb3

still

Reviewed-by: Konrad Dybcio <[email protected]>

Konrad
> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 70 ++++++++++++++++----------------
> 1 file changed, 35 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> index c6475837eda3..9aa8f9a273a8 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> @@ -334,6 +334,12 @@ apcs: syscon@f9011000 {
> reg = <0xf9011000 0x1000>;
> };
>
> + saw_l2: power-controller@f9012000 {
> + compatible = "qcom,saw2";
> + reg = <0xf9012000 0x1000>;
> + regulator;
> + };
> +
> timer@f9020000 {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -393,52 +399,46 @@ frame@f9028000 {
> };
> };
>
> - saw0: power-controller@f9089000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw1: power-controller@f9099000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw2: power-controller@f90a9000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw3: power-controller@f90b9000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw_l2: power-controller@f9012000 {
> - compatible = "qcom,saw2";
> - reg = <0xf9012000 0x1000>;
> - regulator;
> - };
> -
> acc0: power-manager@f9088000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw0: power-controller@f9089000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc1: power-manager@f9098000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw1: power-controller@f9099000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc2: power-manager@f90a8000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw2: power-controller@f90a9000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc3: power-manager@f90b8000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw3: power-controller@f90b9000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> sdhc_1: mmc@f9824900 {
> compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> @@ -1051,6 +1051,15 @@ kpss_out: endpoint {
> };
> };
>
> + bimc: interconnect@fc380000 {
> + reg = <0xfc380000 0x6a000>;
> + compatible = "qcom,msm8974-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
> + };
> +
> gcc: clock-controller@fc400000 {
> compatible = "qcom,gcc-msm8974";
> #clock-cells = <1>;
> @@ -1069,15 +1078,6 @@ rpm_msg_ram: sram@fc428000 {
> reg = <0xfc428000 0x4000>;
> };
>
> - bimc: interconnect@fc380000 {
> - reg = <0xfc380000 0x6a000>;
> - compatible = "qcom,msm8974-bimc";
> - #interconnect-cells = <1>;
> - clock-names = "bus", "bus_a";
> - clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> - <&rpmcc RPM_SMD_BIMC_A_CLK>;
> - };
> -
> snoc: interconnect@fc460000 {
> reg = <0xfc460000 0x4000>;
> compatible = "qcom,msm8974-snoc";
>

2023-09-22 19:47:21

by Luca Weiss

[permalink] [raw]
Subject: Re: [PATCH 0/2] Small style fixes in msm8974.dtsi

On Dienstag, 27. Juni 2023 21:45:12 CEST Luca Weiss wrote:
> While making sure the nodes are sorted correctly, I also noticed that
> some lines are wrongly indented. Fix both.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
> Luca Weiss (2):
> ARM: dts: qcom: msm8974: replace incorrect indentation in interconnect
> ARM: dts: qcom: msm8974: sort nodes by reg
>
> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 80
> ++++++++++++++++---------------- 1 file changed, 40 insertions(+), 40
> deletions(-)
> ---
> base-commit: 53cdf865f90ba922a854c65ed05b519f9d728424
> change-id: 20230627-msm8974-sort-e34b28f10a34
>
> Best regards,

Hi Bjorn,

also ping on this one. I didn't check again if it now conflicts with -next (as
pointed out by Konrad a while ago), if it does let me know and I'll resend.

Regards
Luca


2023-09-23 12:03:16

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH 0/2] Small style fixes in msm8974.dtsi



On 9/22/23 18:59, Luca Weiss wrote:
> On Dienstag, 27. Juni 2023 21:45:12 CEST Luca Weiss wrote:
>> While making sure the nodes are sorted correctly, I also noticed that
>> some lines are wrongly indented. Fix both.
>>
>> Signed-off-by: Luca Weiss <[email protected]>
>> ---
>> Luca Weiss (2):
>> ARM: dts: qcom: msm8974: replace incorrect indentation in interconnect
>> ARM: dts: qcom: msm8974: sort nodes by reg
>>
>> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 80
>> ++++++++++++++++---------------- 1 file changed, 40 insertions(+), 40
>> deletions(-)
>> ---
>> base-commit: 53cdf865f90ba922a854c65ed05b519f9d728424
>> change-id: 20230627-msm8974-sort-e34b28f10a34
>>
>> Best regards,
>
> Hi Bjorn,
>
> also ping on this one. I didn't check again if it now conflicts with -next (as
> pointed out by Konrad a while ago), if it does let me know and I'll resend.
git fetch linux-next
git checkout linux-next/master
b4 shazam <msgid>

if retval == 0:
ping
else
resend

this only takes a couple seconds and saves you the burden of sending
an email and Bjorn of checking ^^

Konrad

2023-09-23 17:37:04

by Luca Weiss

[permalink] [raw]
Subject: Re: [PATCH 0/2] Small style fixes in msm8974.dtsi

On Samstag, 23. September 2023 14:03:05 CEST Konrad Dybcio wrote:
> On 9/22/23 18:59, Luca Weiss wrote:
> > On Dienstag, 27. Juni 2023 21:45:12 CEST Luca Weiss wrote:
> >> While making sure the nodes are sorted correctly, I also noticed that
> >> some lines are wrongly indented. Fix both.
> >>
> >> Signed-off-by: Luca Weiss <[email protected]>
> >> ---
> >>
> >> Luca Weiss (2):
> >> ARM: dts: qcom: msm8974: replace incorrect indentation in
> >> interconnect
> >>
> >> ARM: dts: qcom: msm8974: sort nodes by reg
> >>
> >> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 80
> >>
> >> ++++++++++++++++---------------- 1 file changed, 40 insertions(+), 40
> >> deletions(-)
> >> ---
> >> base-commit: 53cdf865f90ba922a854c65ed05b519f9d728424
> >> change-id: 20230627-msm8974-sort-e34b28f10a34
> >>
> >> Best regards,
> >
> > Hi Bjorn,
> >
> > also ping on this one. I didn't check again if it now conflicts with -next
> > (as pointed out by Konrad a while ago), if it does let me know and I'll
> > resend.
> git fetch linux-next
> git checkout linux-next/master
> b4 shazam <msgid>
>
> if retval == 0:
> ping
> else
> resend
>
> this only takes a couple seconds and saves you the burden of sending
> an email and Bjorn of checking ^^

Well, seems to apply fine still, so seems the other series wasn't picked up
yet. But true, would've been faster to check instead of writing that message
;)

>
> Konrad




2023-10-22 15:46:36

by Bjorn Andersson

[permalink] [raw]
Subject: Re: [PATCH 0/2] Small style fixes in msm8974.dtsi


On Tue, 27 Jun 2023 21:45:12 +0200, Luca Weiss wrote:
> While making sure the nodes are sorted correctly, I also noticed that
> some lines are wrongly indented. Fix both.
>
>

Applied, thanks!

[1/2] ARM: dts: qcom: msm8974: replace incorrect indentation in interconnect
commit: 207f4ce365819ac68b634153d074252338d00ef6
[2/2] ARM: dts: qcom: msm8974: sort nodes by reg
commit: 4960e06d386ecc5307bc2e66a77d5f06df1e2a6f

Best regards,
--
Bjorn Andersson <[email protected]>