On 27/02/2022 10:50, Vincent Shih wrote:
> Add bindings doc for Sunplus EHCI driver
>
> Signed-off-by: Vincent Shih <[email protected]>
> ---
> .../bindings/usb/sunplus,sp7021-usb-ehci.yaml | 97 ++++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 98 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ehci.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ehci.yaml b/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ehci.yaml
> new file mode 100644
> index 0000000..e492f7a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/sunplus,sp7021-usb-ehci.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) Sunplus Co., Ltd. 2021
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/sunplus,sp7021-usb-ehci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sunplus SP7021 EHCI Device Tree bindings for ehci0/ehci1
> +
> +maintainers:
> + - Vincent Shih <[email protected]>
> +
> +allOf:
> + - $ref: usb-hcd.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - sunplus,sp7021-usb-ehci0
> + - sunplus,sp7021-usb-ehci1
How did you address Rob's comments about using one one compatible? You
still have two.
> +
> + clocks:
> + maxItems: 2
> +
> + clock-names:
> + items:
> + - const: usbc_clk
> + - const: uphy_clk
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: usbc_rst
> + - const: uphy_rst
> +
> + reg:
> + items:
> + - description: USBC register region
> + - description: UPHY register region
> + - description: MOON4 register region
> +
> + reg-names:
> + items:
> + - const: usbc
> + - const: uphy
> + - const: moon4
> +
> + interrupts:
> + maxItems: 1
> +
> + nvmem-cell-names:
> + description: names corresponding to the nvmem cells of disconnect voltage
> + const: disc_vol
> +
> + nvmem-cells:
> + description: nvmem cell address of disconnect voltage
> + maxItems: 1
> +
> + port-num:
> + description: identify ehci0 (port0) and ehci1 (port1)
This still should be a dedicated PHY driver referenced here.
Best regards,
Krzysztof