Good Morning,
This is my series to support the usb2 phy devices on the rk356x.
The rk356x phy has a single muxed interrupt and has moved the usb2phy
nodes out of the grf and into their own nodes.
The phy needs to tie back into the grf for register control, similar to
the rv1108.
By moving the phys into their own nodes, they now have full
#address_cells = 2 register addresses, but they still reside below the 32bit
mmio range.
This driver series only supports the host configuration for the rk356x.
I have have tested it on the following:
rk3566 - Pine64 Quartz64 Model A
rk3399 - Pine64 Rockpro64
Please provide feedback and comments as you see fit.
Peter Geis (9):
dt-bindings: soc: rockchip: add rk3568-usb2phy-grf
dt-bindings: phy: phy-rockchip-inno-usb2: add rk3568 documentation
dt-bindings: usb: generic-ohci: increase maximum clocks
phy: phy-rockchip-inno-usb2: support #address_cells = 2
phy: phy-rockchip-inno-usb2: support standalone phy nodes
phy: phy-rockchip-inno-usb2: support muxed interrupts
phy: phy-rockchip-inno-usb2: add rk3568 support
arm64: dts: rockchip: add usb2 nodes to rk3568 device tree
arm64: dts: rockchip: add Quartz64-A usb2 support
.../bindings/phy/phy-rockchip-inno-usb2.yaml | 8 +-
.../devicetree/bindings/soc/rockchip/grf.yaml | 1 +
.../devicetree/bindings/usb/generic-ohci.yaml | 2 +-
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 52 ++++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 97 +++++++
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 259 ++++++++++++++----
6 files changed, 360 insertions(+), 59 deletions(-)
--
2.25.1
The rk3568 generic ohci controller has four clocks.
Increase the maximum clocks in the documentation to account for this.
Signed-off-by: Peter Geis <[email protected]>
---
Documentation/devicetree/bindings/usb/generic-ohci.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
index 569777a76c90..850996e6f451 100644
--- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
@@ -59,7 +59,7 @@ properties:
clocks:
minItems: 1
- maxItems: 3
+ maxItems: 4
description: |
In case the Renesas R-Car Gen3 SoCs:
- if a host only channel: first clock should be host.
--
2.25.1
The rk3568 usb2phy node is a standalone node with a single muxed
interrupt.
Add documentation for it to phy-rockchip-inno-usb2.
Signed-off-by: Peter Geis <[email protected]>
---
.../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
index 5bebd86bf8b6..f16fea5cad1c 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
@@ -18,6 +18,7 @@ properties:
- rockchip,rk3328-usb2phy
- rockchip,rk3366-usb2phy
- rockchip,rk3399-usb2phy
+ - rockchip,rk3568-usb2phy
- rockchip,rv1108-usb2phy
reg:
@@ -50,6 +51,9 @@ properties:
description:
Phandle to the extcon device providing the cable state for the otg phy.
+ interrupts:
+ description: Muxed interrupt for both ports
+
rockchip,usbgrf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -78,8 +82,6 @@ properties:
required:
- "#phy-cells"
- - interrupts
- - interrupt-names
otg-port:
type: object
@@ -109,8 +111,6 @@ properties:
required:
- "#phy-cells"
- - interrupts
- - interrupt-names
required:
- compatible
--
2.25.1
New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only use 32
bit addresses.
Adjust the driver to check if the returned address is "0", and adjust
the index in that case.
Signed-off-by: Peter Geis <[email protected]>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index beacac1dd253..5d2916143df7 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1098,12 +1098,21 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
rphy->usbgrf = NULL;
}
- if (of_property_read_u32(np, "reg", ®)) {
+ if (of_property_read_u32_index(np, "reg", 0, ®)) {
dev_err(dev, "the reg property is not assigned in %pOFn node\n",
np);
return -EINVAL;
}
+ /* support address_cells=2 */
+ if (reg == 0) {
+ if (of_property_read_u32_index(np, "reg", 1, ®)) {
+ dev_err(dev, "the reg property is not assigned in %pOFn node\n",
+ np);
+ return -EINVAL;
+ }
+ }
+
rphy->dev = dev;
phy_cfgs = match->data;
rphy->chg_state = USB_CHG_STATE_UNDEFINED;
--
2.25.1
The rk3568 usb2phy is a standalone device with a single muxed interrupt.
Add support for the registers to the usb2phy driver.
Signed-off-by: Peter Geis <[email protected]>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index fdeb2e7c937a..74420c439a07 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1100,6 +1100,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
if (ret) {
dev_err(rphy->dev, "failed to init irq for host port\n");
goto out;
+ }
if (!IS_ERR(rphy->edev)) {
rport->event_nb.notifier_call = rockchip_otg_event;
@@ -1509,6 +1510,69 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
{ /* sentinel */ }
};
+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
+ {
+ .reg = 0xfe8a0000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
+ .bvalid_det_en = { 0x0080, 2, 2, 0, 1 },
+ .bvalid_det_st = { 0x0084, 2, 2, 0, 1 },
+ .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
+ .utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
+ .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
+ },
+ [USB2PHY_PORT_HOST] = {
+ /* Select suspend control from controller */
+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d2 },
+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
+ }
+ },
+ .chg_det = {
+ .opmode = { 0x0000, 3, 0, 5, 1 },
+ .cp_det = { 0x00c0, 24, 24, 0, 1 },
+ .dcp_det = { 0x00c0, 23, 23, 0, 1 },
+ .dp_det = { 0x00c0, 25, 25, 0, 1 },
+ .idm_sink_en = { 0x0008, 8, 8, 0, 1 },
+ .idp_sink_en = { 0x0008, 7, 7, 0, 1 },
+ .idp_src_en = { 0x0008, 9, 9, 0, 1 },
+ .rdm_pdwn_en = { 0x0008, 10, 10, 0, 1 },
+ .vdm_src_en = { 0x0008, 12, 12, 0, 1 },
+ .vdp_src_en = { 0x0008, 11, 11, 0, 1 },
+ },
+ },
+ {
+ .reg = 0xfe8b0000,
+ .num_ports = 2,
+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 0, 0, 0, 1 },
+ .ls_det_st = { 0x0084, 0, 0, 0, 1 },
+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
+ .utmi_ls = { 0x00c0, 5, 4, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 },
+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
+ }
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
{
.reg = 0x100,
@@ -1558,6 +1622,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
+ { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
{}
};
--
2.25.1
The rk3568 usb2phy has a single muxed interrupt that handles all
interrupts.
Allow the driver to plug in only a single interrupt as necessary.
This currently only supports the host configuration for the new phy.
Signed-off-by: Peter Geis <[email protected]>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 168 +++++++++++++-----
1 file changed, 119 insertions(+), 49 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 84a0c1d697da..fdeb2e7c937a 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -204,6 +204,7 @@ struct rockchip_usb2phy_port {
* @dcd_retries: The retry count used to track Data contact
* detection process.
* @edev: extcon device for notification registration
+ * @irq: muxed interrupt for single irq configuration
* @phy_cfg: phy register configuration, assigned by driver data.
* @ports: phy port instance.
*/
@@ -218,6 +219,7 @@ struct rockchip_usb2phy {
enum power_supply_type chg_type;
u8 dcd_retries;
struct extcon_dev *edev;
+ int irq;
const struct rockchip_usb2phy_cfg *phy_cfg;
struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
};
@@ -934,6 +936,102 @@ static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data)
return IRQ_NONE;
}
+static irqreturn_t rockchip_usb2phy_irq(int irq, void *data)
+{
+ struct rockchip_usb2phy *rphy = data;
+ struct rockchip_usb2phy_port *rport;
+ irqreturn_t ret = IRQ_NONE;
+ unsigned int index;
+
+ for (index = 0; index < rphy->phy_cfg->num_ports; index++) {
+ rport = &rphy->ports[index];
+ if (!rport->phy)
+ continue;
+
+ /* Handle linestate irq for both otg port and host port */
+ ret = rockchip_usb2phy_linestate_irq(irq, rport);
+ }
+
+ return ret;
+}
+
+static int rockchip_usb2phy_port_irq_init(struct rockchip_usb2phy *rphy,
+ struct rockchip_usb2phy_port *rport,
+ struct device_node *child_np)
+{
+ int ret;
+
+ /*
+ * If the usb2 phy used combined irq for otg and host port,
+ * don't need to init otg and host port irq separately.
+ */
+ if (rphy->irq > 0)
+ return 0;
+
+ switch (rport->port_id) {
+ case USB2PHY_PORT_HOST:
+ rport->ls_irq = of_irq_get_byname(child_np, "linestate");
+ if (rport->ls_irq < 0) {
+ dev_err(rphy->dev, "no linestate irq provided\n");
+ return rport->ls_irq;
+ }
+
+ ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
+ rockchip_usb2phy_linestate_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy", rport);
+ if (ret) {
+ dev_err(rphy->dev, "failed to request linestate irq handle\n");
+ return ret;
+ }
+ break;
+ case USB2PHY_PORT_OTG:
+ /*
+ * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate
+ * interrupts muxed together, so probe the otg-mux interrupt first,
+ * if not found, then look for the regular interrupts one by one.
+ */
+ rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux");
+ if (rport->otg_mux_irq > 0) {
+ ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq,
+ NULL,
+ rockchip_usb2phy_otg_mux_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy_otg",
+ rport);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request otg-mux irq handle\n");
+ return ret;
+ }
+ } else {
+ rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid");
+ if (rport->bvalid_irq < 0) {
+ dev_err(rphy->dev, "no vbus valid irq provided\n");
+ ret = rport->bvalid_irq;
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq,
+ NULL,
+ rockchip_usb2phy_bvalid_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy_bvalid",
+ rport);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request otg-bvalid irq handle\n");
+ return ret;
+ }
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
struct rockchip_usb2phy_port *rport,
struct device_node *child_np)
@@ -947,18 +1045,9 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
mutex_init(&rport->mutex);
INIT_DELAYED_WORK(&rport->sm_work, rockchip_usb2phy_sm_work);
- rport->ls_irq = of_irq_get_byname(child_np, "linestate");
- if (rport->ls_irq < 0) {
- dev_err(rphy->dev, "no linestate irq provided\n");
- return rport->ls_irq;
- }
-
- ret = devm_request_threaded_irq(rphy->dev, rport->ls_irq, NULL,
- rockchip_usb2phy_linestate_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy", rport);
+ ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
if (ret) {
- dev_err(rphy->dev, "failed to request linestate irq handle\n");
+ dev_err(rphy->dev, "failed to setup host irq\n");
return ret;
}
@@ -1007,44 +1096,10 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
INIT_DELAYED_WORK(&rport->chg_work, rockchip_chg_detect_work);
INIT_DELAYED_WORK(&rport->otg_sm_work, rockchip_usb2phy_otg_sm_work);
- /*
- * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate
- * interrupts muxed together, so probe the otg-mux interrupt first,
- * if not found, then look for the regular interrupts one by one.
- */
- rport->otg_mux_irq = of_irq_get_byname(child_np, "otg-mux");
- if (rport->otg_mux_irq > 0) {
- ret = devm_request_threaded_irq(rphy->dev, rport->otg_mux_irq,
- NULL,
- rockchip_usb2phy_otg_mux_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy_otg",
- rport);
- if (ret) {
- dev_err(rphy->dev,
- "failed to request otg-mux irq handle\n");
- goto out;
- }
- } else {
- rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid");
- if (rport->bvalid_irq < 0) {
- dev_err(rphy->dev, "no vbus valid irq provided\n");
- ret = rport->bvalid_irq;
- goto out;
- }
-
- ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq,
- NULL,
- rockchip_usb2phy_bvalid_irq,
- IRQF_ONESHOT,
- "rockchip_usb2phy_bvalid",
- rport);
- if (ret) {
- dev_err(rphy->dev,
- "failed to request otg-bvalid irq handle\n");
- goto out;
- }
- }
+ ret = rockchip_usb2phy_port_irq_init(rphy, rport, child_np);
+ if (ret) {
+ dev_err(rphy->dev, "failed to init irq for host port\n");
+ goto out;
if (!IS_ERR(rphy->edev)) {
rport->event_nb.notifier_call = rockchip_otg_event;
@@ -1124,6 +1179,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
phy_cfgs = match->data;
rphy->chg_state = USB_CHG_STATE_UNDEFINED;
rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
+ rphy->irq = platform_get_irq(pdev, 0);
platform_set_drvdata(pdev, rphy);
ret = rockchip_usb2phy_extcon_register(rphy);
@@ -1201,6 +1257,20 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
}
provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+ if (rphy->irq > 0) {
+ ret = devm_request_threaded_irq(rphy->dev, rphy->irq, NULL,
+ rockchip_usb2phy_irq,
+ IRQF_ONESHOT,
+ "rockchip_usb2phy",
+ rphy);
+ if (ret) {
+ dev_err(rphy->dev,
+ "failed to request usb2phy irq handle\n");
+ goto put_child;
+ }
+ }
+
return PTR_ERR_OR_ZERO(provider);
put_child:
--
2.25.1
Add the nodes and regulators to enable usb2 support on the Quartz64
Model A.
Signed-off-by: Peter Geis <[email protected]>
---
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index a3cdb6c2bec6..53ea5c13076b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -75,6 +75,22 @@ vcc5v0_usb: vcc5v0_usb {
vin-supply = <&vcc12v_dcin>;
};
+ /* all four ports are controlled by one gpio
+ * the host ports are sourced from vcc5v0_usb
+ * the otg port is sourced from vcc5v0_midu
+ */
+ vcc5v0_usb20_host: vcc5v0_usb20_host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb20_host";
+ enable-active-high;
+ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb20_host_en>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
vcc3v3_sd: vcc3v3_sd {
compatible = "regulator-fixed";
enable-active-low;
@@ -367,6 +383,12 @@ pmic_int_l: pmic-int-l {
};
};
+ usb2 {
+ vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
vcc_sd {
vcc_sd_h: vcc-sd-h {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -424,3 +446,33 @@ bluetooth {
&uart2 {
status = "okay";
};
+
+&u2phy1_host {
+ phy-supply = <&vcc5v0_usb20_host>;
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vcc5v0_usb20_host>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
--
2.25.1
New Rockchip devices have the usb2 phy devices as standalone nodes
instead of children of the grf node.
Allow the driver to find the grf node from a phandle.
Signed-off-by: Peter Geis <[email protected]>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 5d2916143df7..84a0c1d697da 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -1081,12 +1081,19 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
return -EINVAL;
}
- if (!dev->parent || !dev->parent->of_node)
- return -EINVAL;
+ if (!dev->parent || !dev->parent->of_node) {
+ rphy->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,usbgrf");
+ if (IS_ERR(rphy->grf)) {
+ dev_err(dev, "failed to locate usbgrf\n");
+ return PTR_ERR(rphy->grf);
+ }
+ }
- rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
- if (IS_ERR(rphy->grf))
- return PTR_ERR(rphy->grf);
+ else {
+ rphy->grf = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(rphy->grf))
+ return PTR_ERR(rphy->grf);
+ }
if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
rphy->usbgrf =
--
2.25.1
Add the requisite nodes to the rk3568 device tree to enable the usb2
device controllers.
Includes the usb2phy nodes, usb2phy grf nodes, and usb2 controller
nodes.
Signed-off-by: Peter Geis <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 97 ++++++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 322971318d5a..ea254a58fc01 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -200,6 +200,50 @@ gic: interrupt-controller@fd400000 {
msi-controller;
};
+ usb_host0_ehci: usb@fd800000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xfd800000 0x0 0x40000>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+ <&cru PCLK_USB>, <&usb2phy1>;
+ phys = <&u2phy1_otg>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@fd840000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xfd840000 0x0 0x40000>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+ <&cru PCLK_USB>, <&usb2phy1>;
+ phys = <&u2phy1_otg>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_host1_ehci: usb@fd880000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xfd880000 0x0 0x40000>;
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+ <&cru PCLK_USB>, <&usb2phy1>;
+ phys = <&u2phy1_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_host1_ohci: usb@fd8c0000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xfd8c0000 0x0 0x40000>;
+ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+ <&cru PCLK_USB>, <&usb2phy1>;
+ phys = <&u2phy1_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
pmugrf: syscon@fdc20000 {
compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfdc20000 0x0 0x10000>;
@@ -210,6 +254,16 @@ grf: syscon@fdc60000 {
reg = <0x0 0xfdc60000 0x0 0x10000>;
};
+ usb2phy0_grf: syscon@fdca0000 {
+ compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
+ reg = <0x0 0xfdca0000 0x0 0x8000>;
+ };
+
+ usb2phy1_grf: syscon@fdca8000 {
+ compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
+ reg = <0x0 0xfdca8000 0x0 0x8000>;
+ };
+
pmucru: clock-controller@fdd00000 {
compatible = "rockchip,rk3568-pmucru";
reg = <0x0 0xfdd00000 0x0 0x1000>;
@@ -738,6 +792,49 @@ saradc: saradc@fe720000 {
status = "disabled";
};
+ usb2phy0: usb2-phy@fe8a0000 {
+ compatible = "rockchip,rk3568-usb2phy";
+ reg = <0x0 0xfe8a0000 0x0 0x10000>;
+ clocks = <&pmucru CLK_USBPHY0_REF>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ clock-output-names = "usb480m_phy";
+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,usbgrf = <&usb2phy0_grf>;
+ status = "disabled";
+
+ u2phy0_host: host-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ u2phy0_otg: otg-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ usb2phy1: usb2-phy@fe8b0000 {
+ compatible = "rockchip,rk3568-usb2phy";
+ reg = <0x0 0xfe8b0000 0x0 0x10000>;
+ clocks = <&pmucru CLK_USBPHY1_REF>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,usbgrf = <&usb2phy1_grf>;
+ status = "disabled";
+
+ u2phy1_host: host-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ u2phy1_otg: otg-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <&grf>;
--
2.25.1
Hi Peter,
Am Mittwoch, 28. Juli 2021, 14:26:00 CEST schrieb Peter Geis:
> The rk3568 generic ohci controller has four clocks.
> Increase the maximum clocks in the documentation to account for this.
>
> Signed-off-by: Peter Geis <[email protected]>
> ---
> Documentation/devicetree/bindings/usb/generic-ohci.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> index 569777a76c90..850996e6f451 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> @@ -59,7 +59,7 @@ properties:
>
> clocks:
> minItems: 1
> - maxItems: 3
> + maxItems: 4
> description: |
> In case the Renesas R-Car Gen3 SoCs:
> - if a host only channel: first clock should be host.
>
In the patch adding the usb nodes, I see that this 4th clock references
the clock generated inside usbphy itself.
Does the usb controller actually use that or is this just a way to
enable the usbphy clock, which in that case should maybe just happen
on phy-power-on in the phy driver?
Heiko
Hi Peter,
Some comments. Have a look if it's useful.
On 7/28/21 2:25 PM, Peter Geis wrote:
> The rk3568 usb2phy node is a standalone node with a single muxed
> interrupt.
> Add documentation for it to phy-rockchip-inno-usb2.
>
> Signed-off-by: Peter Geis <[email protected]>
> ---
> .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> index 5bebd86bf8b6..f16fea5cad1c 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> @@ -18,6 +18,7 @@ properties:
> - rockchip,rk3328-usb2phy
> - rockchip,rk3366-usb2phy
> - rockchip,rk3399-usb2phy
> + - rockchip,rk3568-usb2phy
> - rockchip,rv1108-usb2phy
>
> reg:
> @@ -50,6 +51,9 @@ properties:
> description:
> Phandle to the extcon device providing the cable state for the otg phy.
>
> + interrupts:
> + description: Muxed interrupt for both ports
My spelling checker suggest: Mixed. Don't know what's correct...
> +
For rk3568 only.
Could you test/use something like this?
if:
properties:
compatible:
contains:
const: rockchip,rk3568-usb2phy
then:
properties:
interrupts:
maxItems: 1
required:
- interrupts
> rockchip,usbgrf:
> $ref: /schemas/types.yaml#/definitions/phandle
> description:
> @@ -78,8 +82,6 @@ properties:
>
> required:
> - "#phy-cells"
> - - interrupts
> - - interrupt-names
These are still required for other Rockchip SoCs.
Could you test/use something like this?
if:
properties:
compatible:
contains:
const: rockchip,rk3568-usb2phy
else:
required:
- interrupts
- interrupt-names
>
> otg-port:
> type: object
> @@ -109,8 +111,6 @@ properties:
>
> required:
> - "#phy-cells"
> - - interrupts
> - - interrupt-names
dito
>
> required:
> - compatible
>
On Wed, Jul 28, 2021 at 10:59 AM Heiko Stübner <[email protected]> wrote:
>
> Hi Peter,
>
> Am Mittwoch, 28. Juli 2021, 14:26:00 CEST schrieb Peter Geis:
> > The rk3568 generic ohci controller has four clocks.
> > Increase the maximum clocks in the documentation to account for this.
> >
> > Signed-off-by: Peter Geis <[email protected]>
> > ---
> > Documentation/devicetree/bindings/usb/generic-ohci.yaml | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> > index 569777a76c90..850996e6f451 100644
> > --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> > +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> > @@ -59,7 +59,7 @@ properties:
> >
> > clocks:
> > minItems: 1
> > - maxItems: 3
> > + maxItems: 4
> > description: |
> > In case the Renesas R-Car Gen3 SoCs:
> > - if a host only channel: first clock should be host.
> >
>
> In the patch adding the usb nodes, I see that this 4th clock references
> the clock generated inside usbphy itself.
>
> Does the usb controller actually use that or is this just a way to
> enable the usbphy clock, which in that case should maybe just happen
> on phy-power-on in the phy driver?
I'll check if it works without it.
>
>
> Heiko
>
>
On Wed, Jul 28, 2021 at 11:14 AM Johan Jonker <[email protected]> wrote:
>
> Hi Peter,
>
> Some comments. Have a look if it's useful.
>
> On 7/28/21 2:25 PM, Peter Geis wrote:
> > The rk3568 usb2phy node is a standalone node with a single muxed
> > interrupt.
> > Add documentation for it to phy-rockchip-inno-usb2.
> >
> > Signed-off-by: Peter Geis <[email protected]>
> > ---
> > .../devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> > index 5bebd86bf8b6..f16fea5cad1c 100644
> > --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> > +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
> > @@ -18,6 +18,7 @@ properties:
> > - rockchip,rk3328-usb2phy
> > - rockchip,rk3366-usb2phy
> > - rockchip,rk3399-usb2phy
> > + - rockchip,rk3568-usb2phy
> > - rockchip,rv1108-usb2phy
> >
> > reg:
> > @@ -50,6 +51,9 @@ properties:
> > description:
> > Phandle to the extcon device providing the cable state for the otg phy.
> >
>
> > + interrupts:
>
> > + description: Muxed interrupt for both ports
>
> My spelling checker suggest: Mixed. Don't know what's correct...
It is muxed, all interrupts come over the single line.
>
> > +
>
> For rk3568 only.
> Could you test/use something like this?
>
> if:
> properties:
> compatible:
> contains:
> const: rockchip,rk3568-usb2phy
>
> then:
> properties:
> interrupts:
> maxItems: 1
>
> required:
> - interrupts
>
> > rockchip,usbgrf:
> > $ref: /schemas/types.yaml#/definitions/phandle
> > description:
> > @@ -78,8 +82,6 @@ properties:
> >
>
> > required:
> > - "#phy-cells"
> > - - interrupts
> > - - interrupt-names
>
> These are still required for other Rockchip SoCs.
> Could you test/use something like this?
>
> if:
> properties:
> compatible:
> contains:
> const: rockchip,rk3568-usb2phy
>
> else:
> required:
> - interrupts
> - interrupt-names
This is all sane to me, I'll check to ensure it works.
>
> >
> > otg-port:
> > type: object
> > @@ -109,8 +111,6 @@ properties:
> >
>
> > required:
> > - "#phy-cells"
> > - - interrupts
> > - - interrupt-names
>
> dito
>
> >
> > required:
> > - compatible
> >
Thank you for the feedback!