2021-07-18 11:41:50

by Mauro Carvalho Chehab

[permalink] [raw]
Subject: [PATCH v5 4/5] dt-bindings: PCI: remove designware-pcie.txt

Now that the properties defined there were converted to DT schema,
and the other dt-bindings are pointing to the new schemas,
drop it.

Signed-off-by: Mauro Carvalho Chehab <[email protected]>
---
.../bindings/pci/designware-pcie.txt | 77 -------------------
MAINTAINERS | 1 -
2 files changed, 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/designware-pcie.txt

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
deleted file mode 100644
index 78494c4050f7..000000000000
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ /dev/null
@@ -1,77 +0,0 @@
-* Synopsys DesignWare PCIe interface
-
-Required properties:
-- compatible:
- "snps,dw-pcie" for RC mode;
- "snps,dw-pcie-ep" for EP mode;
-- reg: For designware cores version < 4.80 contains the configuration
- address space. For designware core version >= 4.80, contains
- the configuration and ATU address space
-- reg-names: Must be "config" for the PCIe configuration space and "atu" for
- the ATU address space.
- (The old way of getting the configuration address space from "ranges"
- is deprecated and should be avoided.)
-RC mode:
-- #address-cells: set to <3>
-- #size-cells: set to <2>
-- device_type: set to "pci"
-- ranges: ranges for the PCI memory and I/O regions
-- #interrupt-cells: set to <1>
-- interrupt-map-mask and interrupt-map: standard PCI
- properties to define the mapping of the PCIe interface to interrupt
- numbers.
-EP mode:
-- num-ib-windows: number of inbound address translation windows
-- num-ob-windows: number of outbound address translation windows
-
-Optional properties:
-- num-lanes: number of lanes to use (this property should be specified unless
- the link is brought already up in BIOS)
-- reset-gpio: GPIO pin number of power good signal
-- clocks: Must contain an entry for each entry in clock-names.
- See ../clocks/clock-bindings.txt for details.
-- clock-names: Must include the following entries:
- - "pcie"
- - "pcie_bus"
-- snps,enable-cdm-check: This is a boolean property and if present enables
- automatic checking of CDM (Configuration Dependent Module) registers
- for data corruption. CDM registers include standard PCIe configuration
- space registers, Port Logic registers, DMA and iATU (internal Address
- Translation Unit) registers.
-RC mode:
-- num-viewport: number of view ports configured in hardware. If a platform
- does not specify it, the driver assumes 2.
-- bus-range: PCI bus numbers covered (it is recommended for new devicetrees
- to specify this property, to keep backwards compatibility a range of
- 0x00-0xff is assumed if not present)
-
-EP mode:
-- max-functions: maximum number of functions that can be configured
-
-Example configuration:
-
- pcie: pcie@dfc00000 {
- compatible = "snps,dw-pcie";
- reg = <0xdfc00000 0x0001000>, /* IP registers */
- <0xd0000000 0x0002000>; /* Configuration space */
- reg-names = "dbi", "config";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000
- 0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
- interrupts = <25>, <24>;
- #interrupt-cells = <1>;
- num-lanes = <1>;
- };
-or
- pcie: pcie@dfc00000 {
- compatible = "snps,dw-pcie-ep";
- reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
- <0xdfc01000 0x0001000>, /* IP registers 2 */
- <0xd0000000 0x2000000>; /* Configuration space */
- reg-names = "dbi", "dbi2", "addr_space";
- num-ib-windows = <6>;
- num-ob-windows = <2>;
- num-lanes = <1>;
- };
diff --git a/MAINTAINERS b/MAINTAINERS
index 5818733eace7..bc28b27764e1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14305,7 +14305,6 @@ M: Jingoo Han <[email protected]>
M: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
-F: Documentation/devicetree/bindings/pci/designware-pcie.txt
F: Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
F: drivers/pci/controller/dwc/*designware*
--
2.31.1


2021-07-20 03:14:08

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH v5 4/5] dt-bindings: PCI: remove designware-pcie.txt

On Sun, 18 Jul 2021 13:40:51 +0200, Mauro Carvalho Chehab wrote:
> Now that the properties defined there were converted to DT schema,
> and the other dt-bindings are pointing to the new schemas,
> drop it.
>
> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
> ---
> .../bindings/pci/designware-pcie.txt | 77 -------------------
> MAINTAINERS | 1 -
> 2 files changed, 78 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/designware-pcie.txt
>

Applied, thanks!