From: Frieder Schrempf <[email protected]>
In order to support more of the i.MX6UL/ULL-based SoMs and boards by
Kontron Electronics GmbH, we restructure the devicetrees to share common
parts and add new devicetrees for the missing boards.
Currently there are the following SoM flavors:
* N6310: SoM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
* N6311: SoM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND (new)
* N6411: SoM with i.MX6ULL, 512MB RAM, 512MB SPI NAND (new)
Each of the SoMs also features 1MB SPI NOR and an Ethernet PHY. The carrier
board for the evalkit is the same for all SoMs.
Frieder Schrempf (10):
ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate
file
ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S'
and 'N6411 S'
ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
ARM: dts: imx6ul-kontron-n6x1x-s: Specify bus-width for SD card and
eMMC
ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent
polarity to usb nodes
ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix
indentation
dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
MAINTAINERS: Add an entry for Kontron Electronics ARM board support
.../devicetree/bindings/arm/fsl.yaml | 14 +
MAINTAINERS | 6 +
arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
.../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +---
arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 +
.../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 ++
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 422 ++++++++++++++++++
.../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 129 ++++++
arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 +
.../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 ++
10 files changed, 685 insertions(+), 498 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
--
2.17.1
From: Frieder Schrempf <[email protected]>
The N6311 and the N6411 SoM are similar to the Kontron N6310 SoM.
They are pin-compatible, but feature a larger RAM and NAND flash
(512MiB instead of 256MiB). Further, the N6411 has an i.MX6ULL SoC,
instead of an i.MX6UL.
Signed-off-by: Frieder Schrempf <[email protected]>
---
.../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 +++++++++++++++++++
.../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 +++++++++++++++++++
2 files changed, 80 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
new file mode 100644
index 000000000000..a095a7654ac6
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ */
+
+#include "imx6ul.dtsi"
+#include "imx6ul-kontron-n6x1x-som-common.dtsi"
+
+/ {
+ model = "Kontron N6311 SOM";
+ compatible = "kontron,imx6ul-n6311-som", "fsl,imx6ul";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ device_type = "memory";
+ };
+};
+
+&qspi {
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+
+ partition@0 {
+ label = "ubi1";
+ reg = <0x00000000 0x08000000>;
+ };
+
+ partition@8000000 {
+ label = "ubi2";
+ reg = <0x08000000 0x18000000>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi b/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
new file mode 100644
index 000000000000..b7e984284e1a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ */
+
+#include "imx6ull.dtsi"
+#include "imx6ul-kontron-n6x1x-som-common.dtsi"
+
+/ {
+ model = "Kontron N6411 SOM";
+ compatible = "kontron,imx6ull-n6311-som", "fsl,imx6ull";
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ device_type = "memory";
+ };
+};
+
+&qspi {
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+
+ partition@0 {
+ label = "ubi1";
+ reg = <0x00000000 0x08000000>;
+ };
+
+ partition@8000000 {
+ label = "ubi2";
+ reg = <0x08000000 0x18000000>;
+ };
+ };
+};
--
2.17.1
From: Frieder Schrempf <[email protected]>
The Kontron N6311 and N6411 SoMs are very similar to N6310. In
preparation to add support for them, we move the common nodes to a
separate file imx6ul-kontron-n6x1x-som-common.dtsi.
Signed-off-by: Frieder Schrempf <[email protected]>
---
.../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +-------------
.../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 123 ++++++++++++++++++
2 files changed, 124 insertions(+), 94 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
index a896b2348dd2..47d3ce5d255f 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
@@ -6,7 +6,7 @@
*/
#include "imx6ul.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include "imx6ul-kontron-n6x1x-som-common.dtsi"
/ {
model = "Kontron N6310 SOM";
@@ -18,49 +18,7 @@
};
};
-&ecspi2 {
- cs-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
- status = "okay";
-
- spi-flash@0 {
- compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
- spi-max-frequency = <50000000>;
- reg = <0>;
- };
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
- phy-mode = "rmii";
- phy-handle = <ðphy1>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- micrel,led-mode = <0>;
- clocks = <&clks IMX6UL_CLK_ENET_REF>;
- clock-names = "rmii-ref";
- };
- };
-};
-
-&fec2 {
- phy-mode = "rmii";
- status = "disabled";
-};
-
&qspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_qspi>;
- status = "okay";
-
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
@@ -81,54 +39,3 @@
};
};
};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reset_out>;
-
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins = <
- MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x100b1
- MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x100b1
- MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x100b1
- MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x100b1
- >;
- };
-
- pinctrl_enet1: enet1grp {
- fsl,pins = <
- MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
- MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
- MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
- MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
- MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
- MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
- MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
- MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b009
- >;
- };
-
- pinctrl_enet1_mdio: enet1mdiogrp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
- MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
- >;
- };
-
- pinctrl_qspi: qspigrp {
- fsl,pins = <
- MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
- MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
- MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
- MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
- MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
- MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
- >;
- };
-
- pinctrl_reset_out: rstoutgrp {
- fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
- >;
- };
-};
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
new file mode 100644
index 000000000000..ba50c2966998
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ * Copyright (c) 2019 Krzysztof Kozlowski <[email protected]>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+&ecspi2 {
+ cs-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ status = "okay";
+
+ spi-flash@0 {
+ compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ micrel,led-mode = <0>;
+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&fec2 {
+ phy-mode = "rmii";
+ status = "disabled";
+};
+
+&qspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi>;
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <108000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+
+ partition@0 {
+ label = "ubi1";
+ reg = <0x00000000 0x08000000>;
+ };
+
+ partition@8000000 {
+ label = "ubi2";
+ reg = <0x08000000 0x08000000>;
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reset_out>;
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x100b1
+ MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x100b1
+ MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x100b1
+ MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x100b1
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b009
+ >;
+ };
+
+ pinctrl_enet1_mdio: enet1mdiogrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
+ >;
+ };
+
+ pinctrl_qspi: qspigrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
+ MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
+ MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
+ MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
+ MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
+ MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
+ >;
+ };
+
+ pinctrl_reset_out: rstoutgrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
+ >;
+ };
+};
--
2.17.1
From: Frieder Schrempf <[email protected]>
The Kontron N6x1x SoMs all use uart4 as a debug serial interface.
Therefore we set in the 'chosen' node.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
index ba50c2966998..e8e44fb2afc5 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
@@ -7,6 +7,12 @@
#include <dt-bindings/gpio/gpio.h>
+/ {
+ chosen {
+ stdout-path = &uart4;
+ };
+};
+
&ecspi2 {
cs-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
--
2.17.1
From: Frieder Schrempf <[email protected]>
Add the compatibles for Kontron i.MX6UL N6311 SoM and boards and
the compatibles for Kontron i.MX6ULL N6411 SoM and boards.
Signed-off-by: Frieder Schrempf <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 1b4b4e6573b5..6d718272725d 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -162,6 +162,7 @@ properties:
- enum:
- fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board
- kontron,imx6ul-n6310-som # Kontron N6310 SOM
+ - kontron,imx6ul-n6311-som # Kontron N6311 SOM
- const: fsl,imx6ul
- description: Kontron N6310 S Board
@@ -170,6 +171,12 @@ properties:
- const: kontron,imx6ul-n6310-som
- const: fsl,imx6ul
+ - description: Kontron N6311 S Board
+ items:
+ - const: kontron,imx6ul-n6311-s
+ - const: kontron,imx6ul-n6311-som
+ - const: fsl,imx6ul
+
- description: Kontron N6310 S 43 Board
items:
- const: kontron,imx6ul-n6310-s-43
@@ -181,6 +188,13 @@ properties:
items:
- enum:
- fsl,imx6ull-14x14-evk # i.MX6 UltraLiteLite 14x14 EVK Board
+ - kontron,imx6ull-n6411-som # Kontron N6411 SOM
+ - const: fsl,imx6ull
+
+ - description: Kontron N6411 S Board
+ items:
+ - const: kontron,imx6ull-n6411-s
+ - const: kontron,imx6ull-n6411-som
- const: fsl,imx6ull
- description: i.MX6ULZ based Boards
--
2.17.1
From: Frieder Schrempf <[email protected]>
Both, the SD card and the eMMC are connected to the usdhc controller
by four data lines. Therefore we set 'bus-width = <4>' for both
interfaces.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
index 08a326ce2cbe..779d75f42268 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
@@ -207,6 +207,7 @@
wakeup-source;
vmmc-supply = <®_3v3>;
voltage-ranges = <3300 3300>;
+ bus-width = <4>;
no-1-8-v;
status = "okay";
};
@@ -221,6 +222,7 @@
wakeup-source;
vmmc-supply = <®_3v3>;
voltage-ranges = <3300 3300>;
+ bus-width = <4>;
no-1-8-v;
status = "okay";
};
--
2.17.1
From: Frieder Schrempf <[email protected]>
To silence the warnings shown by the driver at boot time, we add a
fixed regulator for the 5V supply of usbotg2 and specify the polarity
of the overcurrent signal for usbotg1.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
index 779d75f42268..a2393568488f 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
@@ -43,6 +43,13 @@
regulator-max-microvolt = <3300000>;
};
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
@@ -189,6 +196,7 @@
srp-disable;
hnp-disable;
adp-disable;
+ over-current-active-low;
vbus-supply = <®_usb_otg1_vbus>;
status = "okay";
};
@@ -196,6 +204,7 @@
&usbotg2 {
dr_mode = "host";
disable-over-current;
+ vbus-supply = <®_5v>;
status = "okay";
};
--
2.17.1
From: Frieder Schrempf <[email protected]>
The baseboard for the Kontron N6310 SoM is also used for other SoMs
such as N6311 and N6411. In order to share the code, we move the
definitions of the baseboard to a separate dtsi file.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 412 ++++++++++++++++++
2 files changed, 413 insertions(+), 404 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts b/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
index 0205fd56d975..5a3e06d6219b 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
@@ -8,413 +8,10 @@
/dts-v1/;
#include "imx6ul-kontron-n6310-som.dtsi"
+#include "imx6ul-kontron-n6x1x-s.dtsi"
/ {
model = "Kontron N6310 S";
compatible = "kontron,imx6ul-n6310-s", "kontron,imx6ul-n6310-som",
"fsl,imx6ul";
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_leds>;
-
- led1 {
- label = "debug-led1";
- gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
- default-state = "off";
- linux,default-trigger = "heartbeat";
- };
-
- led2 {
- label = "debug-led2";
- gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- led3 {
- label = "debug-led3";
- gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
- };
-
- pwm-beeper {
- compatible = "pwm-beeper";
- pwms = <&pwm8 0 5000>;
- };
-
- reg_3v3: regulator-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb_otg1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_vref_adc: regulator-vref-adc {
- compatible = "regulator-fixed";
- regulator-name = "vref-adc";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-};
-
-&adc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_adc1>;
- num-channels = <3>;
- vref-supply = <®_vref_adc>;
- status = "okay";
-};
-
-&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- status = "okay";
-};
-
-&ecspi1 {
- cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
-
- eeprom@0 {
- compatible = "anvo,anv32e61w", "atmel,at25";
- reg = <0>;
- spi-max-frequency = <20000000>;
- spi-cpha;
- spi-cpol;
- pagesize = <1>;
- size = <8192>;
- address-width = <16>;
- };
-};
-
-&fec1 {
- pinctrl-0 = <&pinctrl_enet1>;
- /delete-node/ mdio;
-};
-
-&fec2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
- phy-mode = "rmii";
- phy-handle = <ðphy2>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- micrel,led-mode = <0>;
- clocks = <&clks IMX6UL_CLK_ENET_REF>;
- clock-names = "rmii-ref";
- };
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- micrel,led-mode = <0>;
- clocks = <&clks IMX6UL_CLK_ENET2_REF>;
- clock-names = "rmii-ref";
- };
- };
-};
-
-&i2c1 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-};
-
-&i2c4 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- status = "okay";
-
- rtc@32 {
- compatible = "epson,rx8900";
- reg = <0x32>;
- };
-};
-
-&pwm8 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm8>;
- status = "okay";
-};
-
-&snvs_poweroff {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- linux,rs485-enabled-at-boot-time;
- rs485-rx-during-tx;
- rs485-rts-active-low;
- uart-has-rtscts;
- status = "okay";
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- fsl,uart-has-rtscts;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- status = "okay";
-};
-
-&usbotg1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg1>;
- dr_mode = "otg";
- srp-disable;
- hnp-disable;
- adp-disable;
- vbus-supply = <®_usb_otg1_vbus>;
- status = "okay";
-};
-
-&usbotg2 {
- dr_mode = "host";
- disable-over-current;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1>;
- cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
- keep-power-in-suspend;
- wakeup-source;
- vmmc-supply = <®_3v3>;
- voltage-ranges = <3300 3300>;
- no-1-8-v;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
- non-removable;
- keep-power-in-suspend;
- wakeup-source;
- vmmc-supply = <®_3v3>;
- voltage-ranges = <3300 3300>;
- no-1-8-v;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
-
- pinctrl_adc1: adc1grp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
- MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
- MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
- >;
- };
-
- /* FRAM */
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <
- MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
- MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
- MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
- MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
- >;
- };
-
- pinctrl_enet2: enet2grp {
- fsl,pins = <
- MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
- MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
- MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
- MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
- MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
- MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
- >;
- };
-
- pinctrl_enet2_mdio: enet2mdiogrp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
- MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
- >;
- };
-
- pinctrl_flexcan2: flexcan2grp{
- fsl,pins = <
- MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
- MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
- >;
- };
-
- pinctrl_gpio: gpiogrp {
- fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
- >;
- };
-
- pinctrl_gpio_leds: gpioledsgrp {
- fsl,pins = <
- MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
- MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
- MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
- MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
- >;
- };
-
- pinctrl_i2c4: i2c4grp {
- fsl,pins = <
- MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
- MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
- >;
- };
-
- pinctrl_pwm8: pwm8grp {
- fsl,pins = <
- MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
- MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
- >;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <
- MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
- MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
- MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
- /*
- * mux unused RTS to make sure it doesn't cause
- * any interrupts when it is undefined
- */
- MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
- >;
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins = <
- MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
- MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
- MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
- MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
- >;
- };
-
- pinctrl_uart4: uart4grp {
- fsl,pins = <
- MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
- MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
- >;
- };
-
- pinctrl_usbotg1: usbotg1 {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
- MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
- MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
- MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
- MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
- MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
- MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
- MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
- MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
- MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
- MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
- MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins = <
- MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
- MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
- MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
- MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
- MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
- MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins = <
- MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
- MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
- MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
- MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
- MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
- MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
- >;
- };
};
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
new file mode 100644
index 000000000000..08a326ce2cbe
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
@@ -0,0 +1,412 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ * Copyright (c) 2019 Krzysztof Kozlowski <[email protected]>
+ */
+
+/ {
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ led1 {
+ label = "debug-led1";
+ gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led2 {
+ label = "debug-led2";
+ gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led3 {
+ label = "debug-led3";
+ gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ pwm-beeper {
+ compatible = "pwm-beeper";
+ pwms = <&pwm8 0 5000>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vref_adc: regulator-vref-adc {
+ compatible = "regulator-fixed";
+ regulator-name = "vref-adc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&adc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc1>;
+ num-channels = <3>;
+ vref-supply = <®_vref_adc>;
+ status = "okay";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "okay";
+};
+
+&ecspi1 {
+ cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "anvo,anv32e61w", "atmel,at25";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-cpha;
+ spi-cpol;
+ pagesize = <1>;
+ size = <8192>;
+ address-width = <16>;
+ };
+};
+
+&fec1 {
+ pinctrl-0 = <&pinctrl_enet1>;
+ /delete-node/ mdio;
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy2>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ micrel,led-mode = <0>;
+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
+ clock-names = "rmii-ref";
+ };
+
+ ethphy2: ethernet-phy@2 {
+ reg = <2>;
+ micrel,led-mode = <0>;
+ clocks = <&clks IMX6UL_CLK_ENET2_REF>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+
+ rtc@32 {
+ compatible = "epson,rx8900";
+ reg = <0x32>;
+ };
+};
+
+&pwm8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm8>;
+ status = "okay";
+};
+
+&snvs_poweroff {
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ linux,rs485-enabled-at-boot-time;
+ rs485-rx-during-tx;
+ rs485-rts-active-low;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbotg1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1>;
+ dr_mode = "otg";
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ vbus-supply = <®_usb_otg1_vbus>;
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ keep-power-in-suspend;
+ wakeup-source;
+ vmmc-supply = <®_3v3>;
+ voltage-ranges = <3300 3300>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+ non-removable;
+ keep-power-in-suspend;
+ wakeup-source;
+ vmmc-supply = <®_3v3>;
+ voltage-ranges = <3300 3300>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
+
+ pinctrl_adc1: adc1grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
+ >;
+ };
+
+ /* FRAM */
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
+ MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
+ MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
+ MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
+ >;
+ };
+
+ pinctrl_enet2_mdio: enet2mdiogrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp{
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_gpio: gpiogrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
+ >;
+ };
+
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
+ MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
+ MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
+ MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
+ >;
+ };
+
+ pinctrl_pwm8: pwm8grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
+ /*
+ * mux unused RTS to make sure it doesn't cause
+ * any interrupts when it is undefined
+ */
+ MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
+ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg1: usbotg1 {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
+ >;
+ };
+};
--
2.17.1
From: Frieder Schrempf <[email protected]>
The ECSPI1 is not used for a FRAM chip, so remove the comment.
While at it, also change some whitespaces to tabs to comply with the
indentation style of the rest of the file.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
index a2393568488f..c4b3d4f0be57 100644
--- a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
@@ -254,7 +254,6 @@
>;
};
- /* FRAM */
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
@@ -279,8 +278,8 @@
pinctrl_enet2_mdio: enet2mdiogrp {
fsl,pins = <
- MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
- MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
>;
};
@@ -293,10 +292,10 @@
pinctrl_gpio: gpiogrp {
fsl,pins = <
- MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
- MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
- MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
- MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
+ MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
+ MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
>;
};
--
2.17.1
From: Frieder Schrempf <[email protected]>
The 'N6311 S' and the 'N6411 S' are similar to the Kontron 'N6310 S'
evaluation kit boards. Instead of the N6310 SoM, they feature a N6311
or N6411 SoM.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 ++++++++++++++++
arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 ++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts b/arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
new file mode 100644
index 000000000000..239a1af3aeaa
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ */
+
+/dts-v1/;
+
+#include "imx6ul-kontron-n6311-som.dtsi"
+#include "imx6ul-kontron-n6x1x-s.dtsi"
+
+/ {
+ model = "Kontron N6311 S";
+ compatible = "kontron,imx6ul-n6311-s", "kontron,imx6ul-n6311-som",
+ "fsl,imx6ul";
+};
diff --git a/arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts b/arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
new file mode 100644
index 000000000000..57588a5e1e34
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 exceet electronics GmbH
+ * Copyright (C) 2019 Kontron Electronics GmbH
+ */
+
+/dts-v1/;
+
+#include "imx6ull-kontron-n6411-som.dtsi"
+#include "imx6ul-kontron-n6x1x-s.dtsi"
+
+/ {
+ model = "Kontron N6411 S";
+ compatible = "kontron,imx6ull-n6411-s", "kontron,imx6ull-n6411-som",
+ "fsl,imx6ull";
+};
--
2.17.1
From: Frieder Schrempf <[email protected]>
Kontron Electronics GmbH produces several ARM boards, that are
planned to be upstreamed eventually. For now we have some
i.MX6UL/ULL based SoMs and boards, that are already available
in the kernel.
Signed-off-by: Frieder Schrempf <[email protected]>
---
MAINTAINERS | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 296de2b51c83..a461d31ee98d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9103,6 +9103,12 @@ F: include/linux/kmod.h
F: lib/test_kmod.c
F: tools/testing/selftests/kmod/
+KONTRON ELECTRONICS ARM BOARDS SUPPORT
+M: Frieder Schrempf <[email protected]>
+S: Maintained
+F: arch/arm/boot/dts/imx6ul-kontron-*
+F: arch/arm/boot/dts/imx6ull-kontron-*
+
KPROBES
M: Naveen N. Rao <[email protected]>
M: Anil S Keshavamurthy <[email protected]>
--
2.17.1
Hi Marco,
On 17.10.19 10:14, Marco Felsch wrote:
> Hi Frieder,
>
> On 19-10-16 15:06, Schrempf Frieder wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> In order to support more of the i.MX6UL/ULL-based SoMs and boards by
>> Kontron Electronics GmbH, we restructure the devicetrees to share common
>> parts and add new devicetrees for the missing boards.
>>
>> Currently there are the following SoM flavors:
>> * N6310: SoM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
>> * N6311: SoM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND (new)
>> * N6411: SoM with i.MX6ULL, 512MB RAM, 512MB SPI NAND (new)
>>
>> Each of the SoMs also features 1MB SPI NOR and an Ethernet PHY. The carrier
>> board for the evalkit is the same for all SoMs.
>>
>> Frieder Schrempf (10):
>> ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate
>> file
>> ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
>> ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
>> ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S'
>> and 'N6411 S'
>> ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
>> ARM: dts: imx6ul-kontron-n6x1x-s: Specify bus-width for SD card and
>> eMMC
>> ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent
>> polarity to usb nodes
>> ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix
>> indentation
>> dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
>> MAINTAINERS: Add an entry for Kontron Electronics ARM board support
>
> Did you send all patches to same To: and Cc:?
No, I have a script that runs get_maintainer.pl for each patch. So the
recipients might differ. I only had Krzysztof and Rob as hard-coded
recipients for the whole series.
Do you think I should change this so each recipient receives the whole
series?
Thanks,
Frieder
>
> Regards,
> Marco
>
>>
>> .../devicetree/bindings/arm/fsl.yaml | 14 +
>> MAINTAINERS | 6 +
>> arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
>> .../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +---
>> arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 +
>> .../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 ++
>> arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 422 ++++++++++++++++++
>> .../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 129 ++++++
>> arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 +
>> .../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 ++
>> 10 files changed, 685 insertions(+), 498 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
>> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
>> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
>>
>> --
>> 2.17.1
>>
>>
>
Hi Frieder,
On 19-10-16 15:06, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> In order to support more of the i.MX6UL/ULL-based SoMs and boards by
> Kontron Electronics GmbH, we restructure the devicetrees to share common
> parts and add new devicetrees for the missing boards.
>
> Currently there are the following SoM flavors:
> * N6310: SoM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
> * N6311: SoM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND (new)
> * N6411: SoM with i.MX6ULL, 512MB RAM, 512MB SPI NAND (new)
>
> Each of the SoMs also features 1MB SPI NOR and an Ethernet PHY. The carrier
> board for the evalkit is the same for all SoMs.
>
> Frieder Schrempf (10):
> ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate
> file
> ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
> ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
> ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S'
> and 'N6411 S'
> ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
> ARM: dts: imx6ul-kontron-n6x1x-s: Specify bus-width for SD card and
> eMMC
> ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent
> polarity to usb nodes
> ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix
> indentation
> dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
> MAINTAINERS: Add an entry for Kontron Electronics ARM board support
Did you send all patches to same To: and Cc:?
Regards,
Marco
>
> .../devicetree/bindings/arm/fsl.yaml | 14 +
> MAINTAINERS | 6 +
> arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
> .../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +---
> arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 +
> .../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 ++
> arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 422 ++++++++++++++++++
> .../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 129 ++++++
> arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 +
> .../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 ++
> 10 files changed, 685 insertions(+), 498 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
>
> --
> 2.17.1
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
On Wed, Oct 16, 2019 at 03:07:19PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> The Kontron N6311 and N6411 SoMs are very similar to N6310. In
> preparation to add support for them, we move the common nodes to a
> separate file imx6ul-kontron-n6x1x-som-common.dtsi.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> .../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +-------------
> .../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 123 ++++++++++++++++++
> 2 files changed, 124 insertions(+), 94 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
>
> diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
> index a896b2348dd2..47d3ce5d255f 100644
> --- a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
> +++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
> @@ -6,7 +6,7 @@
> */
>
> #include "imx6ul.dtsi"
> -#include <dt-bindings/gpio/gpio.h>
> +#include "imx6ul-kontron-n6x1x-som-common.dtsi"
>
> / {
> model = "Kontron N6310 SOM";
> @@ -18,49 +18,7 @@
> };
> };
>
> -&ecspi2 {
> - cs-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_ecspi2>;
> - status = "okay";
> -
> - spi-flash@0 {
> - compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
> - spi-max-frequency = <50000000>;
> - reg = <0>;
> - };
> -};
> -
> -&fec1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
> - phy-mode = "rmii";
> - phy-handle = <ðphy1>;
> - status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy1: ethernet-phy@1 {
> - reg = <1>;
> - micrel,led-mode = <0>;
> - clocks = <&clks IMX6UL_CLK_ENET_REF>;
> - clock-names = "rmii-ref";
> - };
> - };
> -};
> -
> -&fec2 {
> - phy-mode = "rmii";
> - status = "disabled";
> -};
> -
> &qspi {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_qspi>;
> - status = "okay";
> -
> spi-flash@0 {
You left qspi and flash partitions here, while adding it later. It is
not pure move then and some duplicated stuff remains.
Best regards,
Krzysztof
On Wed, Oct 16, 2019 at 03:07:21PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> The N6311 and the N6411 SoM are similar to the Kontron N6310 SoM.
> They are pin-compatible, but feature a larger RAM and NAND flash
> (512MiB instead of 256MiB). Further, the N6411 has an i.MX6ULL SoC,
> instead of an i.MX6UL.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> .../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 +++++++++++++++++++
> .../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 +++++++++++++++++++
> 2 files changed, 80 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Oct 16, 2019 at 03:07:25PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> The baseboard for the Kontron N6310 SoM is also used for other SoMs
> such as N6311 and N6411. In order to share the code, we move the
> definitions of the baseboard to a separate dtsi file.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
> arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 412 ++++++++++++++++++
> 2 files changed, 413 insertions(+), 404 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
>
> diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts b/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
> index 0205fd56d975..5a3e06d6219b 100644
> --- a/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
> +++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts
> @@ -8,413 +8,10 @@
> /dts-v1/;
>
> #include "imx6ul-kontron-n6310-som.dtsi"
> +#include "imx6ul-kontron-n6x1x-s.dtsi"
>
> / {
> model = "Kontron N6310 S";
> compatible = "kontron,imx6ul-n6310-s", "kontron,imx6ul-n6310-som",
> "fsl,imx6ul";
> -
> - gpio-leds {
> - compatible = "gpio-leds";
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_gpio_leds>;
> -
> - led1 {
> - label = "debug-led1";
> - gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
> - default-state = "off";
> - linux,default-trigger = "heartbeat";
> - };
> -
> - led2 {
> - label = "debug-led2";
> - gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
> - default-state = "off";
> - };
> -
> - led3 {
> - label = "debug-led3";
> - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
> - default-state = "off";
> - };
> - };
> -
> - pwm-beeper {
> - compatible = "pwm-beeper";
> - pwms = <&pwm8 0 5000>;
> - };
> -
> - reg_3v3: regulator-3v3 {
> - compatible = "regulator-fixed";
> - regulator-name = "3v3";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - };
> -
> - reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
> - compatible = "regulator-fixed";
> - regulator-name = "usb_otg1_vbus";
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> -
> - reg_vref_adc: regulator-vref-adc {
> - compatible = "regulator-fixed";
> - regulator-name = "vref-adc";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - };
> -};
> -
> -&adc1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_adc1>;
> - num-channels = <3>;
> - vref-supply = <®_vref_adc>;
> - status = "okay";
> -};
> -
> -&can2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_flexcan2>;
> - status = "okay";
> -};
> -
> -&ecspi1 {
> - cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_ecspi1>;
> - status = "okay";
> -
> - eeprom@0 {
> - compatible = "anvo,anv32e61w", "atmel,at25";
> - reg = <0>;
> - spi-max-frequency = <20000000>;
> - spi-cpha;
> - spi-cpol;
> - pagesize = <1>;
> - size = <8192>;
> - address-width = <16>;
> - };
> -};
> -
> -&fec1 {
> - pinctrl-0 = <&pinctrl_enet1>;
> - /delete-node/ mdio;
> -};
> -
> -&fec2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
> - phy-mode = "rmii";
> - phy-handle = <ðphy2>;
> - status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy1: ethernet-phy@1 {
> - reg = <1>;
> - micrel,led-mode = <0>;
> - clocks = <&clks IMX6UL_CLK_ENET_REF>;
> - clock-names = "rmii-ref";
> - };
> -
> - ethphy2: ethernet-phy@2 {
> - reg = <2>;
> - micrel,led-mode = <0>;
> - clocks = <&clks IMX6UL_CLK_ENET2_REF>;
> - clock-names = "rmii-ref";
> - };
> - };
> -};
> -
> -&i2c1 {
> - clock-frequency = <100000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c1>;
> - status = "okay";
> -};
> -
> -&i2c4 {
> - clock-frequency = <100000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c4>;
> - status = "okay";
> -
> - rtc@32 {
> - compatible = "epson,rx8900";
> - reg = <0x32>;
> - };
> -};
> -
> -&pwm8 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_pwm8>;
> - status = "okay";
> -};
> -
> -&snvs_poweroff {
> - status = "okay";
> -};
> -
> -&uart1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart1>;
> - status = "okay";
> -};
> -
> -&uart2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart2>;
> - linux,rs485-enabled-at-boot-time;
> - rs485-rx-during-tx;
> - rs485-rts-active-low;
> - uart-has-rtscts;
> - status = "okay";
> -};
> -
> -&uart3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart3>;
> - fsl,uart-has-rtscts;
> - status = "okay";
> -};
> -
> -&uart4 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_uart4>;
> - status = "okay";
> -};
> -
> -&usbotg1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_usbotg1>;
> - dr_mode = "otg";
> - srp-disable;
> - hnp-disable;
> - adp-disable;
> - vbus-supply = <®_usb_otg1_vbus>;
> - status = "okay";
> -};
> -
> -&usbotg2 {
> - dr_mode = "host";
> - disable-over-current;
> - status = "okay";
> -};
> -
> -&usdhc1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_usdhc1>;
> - cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
> - keep-power-in-suspend;
> - wakeup-source;
> - vmmc-supply = <®_3v3>;
> - voltage-ranges = <3300 3300>;
> - no-1-8-v;
> - status = "okay";
> -};
> -
> -&usdhc2 {
> - pinctrl-names = "default", "state_100mhz", "state_200mhz";
> - pinctrl-0 = <&pinctrl_usdhc2>;
> - pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> - pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
> - non-removable;
> - keep-power-in-suspend;
> - wakeup-source;
> - vmmc-supply = <®_3v3>;
> - voltage-ranges = <3300 3300>;
> - no-1-8-v;
> - status = "okay";
> -};
> -
> -&wdog1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_wdog>;
> - fsl,ext-reset-output;
> - status = "okay";
> -};
> -
> -&iomuxc {
> - pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
> -
> - pinctrl_adc1: adc1grp {
> - fsl,pins = <
> - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
> - MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
> - MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
> - >;
> - };
> -
> - /* FRAM */
> - pinctrl_ecspi1: ecspi1grp {
> - fsl,pins = <
> - MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
> - MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
> - MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
> - MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
> - >;
> - };
> -
> - pinctrl_enet2: enet2grp {
> - fsl,pins = <
> - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
> - MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
> - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
> - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
> - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
> - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
> - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
> - MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
> - >;
> - };
> -
> - pinctrl_enet2_mdio: enet2mdiogrp {
> - fsl,pins = <
> - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
> - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
> - >;
> - };
> -
> - pinctrl_flexcan2: flexcan2grp{
> - fsl,pins = <
> - MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
> - MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
> - >;
> - };
> -
> - pinctrl_gpio: gpiogrp {
> - fsl,pins = <
> - MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
> - MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
> - MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
> - MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
> - >;
> - };
> -
> - pinctrl_gpio_leds: gpioledsgrp {
> - fsl,pins = <
> - MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
> - MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
> - MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
> - >;
> - };
> -
> - pinctrl_i2c1: i2c1grp {
> - fsl,pins = <
> - MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
> - MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
> - >;
> - };
> -
> - pinctrl_i2c4: i2c4grp {
> - fsl,pins = <
> - MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
> - MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
> - >;
> - };
> -
> - pinctrl_pwm8: pwm8grp {
> - fsl,pins = <
> - MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
> - >;
> - };
> -
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
> - MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
> - >;
> - };
> -
> - pinctrl_uart2: uart2grp {
> - fsl,pins = <
> - MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
> - MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
> - MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
> - /*
> - * mux unused RTS to make sure it doesn't cause
> - * any interrupts when it is undefined
> - */
> - MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
> - >;
> - };
> -
> - pinctrl_uart3: uart3grp {
> - fsl,pins = <
> - MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
> - MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
> - MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
> - MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
> - >;
> - };
> -
> - pinctrl_uart4: uart4grp {
> - fsl,pins = <
> - MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
> - MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
> - >;
> - };
> -
> - pinctrl_usbotg1: usbotg1 {
> - fsl,pins = <
> - MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
> - >;
> - };
> -
> - pinctrl_usdhc1: usdhc1grp {
> - fsl,pins = <
> - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
> - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
> - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
> - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
> - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
> - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
> - MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
> - >;
> - };
> -
> - pinctrl_usdhc2: usdhc2grp {
> - fsl,pins = <
> - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
> - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
> - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
> - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
> - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
> - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
> - >;
> - };
> -
> - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> - fsl,pins = <
> - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
> - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
> - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
> - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
> - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
> - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
> - >;
> - };
> -
> - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> - fsl,pins = <
> - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
> - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
> - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
> - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
> - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
> - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
> - >;
> - };
> -
> - pinctrl_wdog: wdoggrp {
> - fsl,pins = <
> - MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
> - >;
> - };
> };
> diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
> new file mode 100644
> index 000000000000..08a326ce2cbe
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
> @@ -0,0 +1,412 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2017 exceet electronics GmbH
> + * Copyright (C) 2018 Kontron Electronics GmbH
> + * Copyright (c) 2019 Krzysztof Kozlowski <[email protected]>
> + */
> +
This file does not include anything else but uses defines (GPIO flags,
clocks, pins). Usually sources should not rely on inclusions coming from
unrelated files so here you should include necessary headers. In case of
future refactorings or reuse one might not know which defines you wanted
to use (in other platforms for example there might be multiple defines
in multiple header files with same name).
Best regards,
Krzysztof
On Wed, Oct 16, 2019 at 03:07:28PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> The 'N6311 S' and the 'N6411 S' are similar to the Kontron 'N6310 S'
> evaluation kit boards. Instead of the N6310 SoM, they feature a N6311
> or N6411 SoM.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 ++++++++++++++++
> arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 ++++++++++++++++
> 2 files changed, 32 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Oct 16, 2019 at 03:07:36PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> Add the compatibles for Kontron i.MX6UL N6311 SoM and boards and
> the compatibles for Kontron i.MX6ULL N6411 SoM and boards.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Oct 16, 2019 at 03:07:28PM +0000, Schrempf Frieder wrote:
> From: Frieder Schrempf <[email protected]>
>
> The Kontron N6x1x SoMs all use uart4 as a debug serial interface.
> Therefore we set in the 'chosen' node.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
Hi Frieder,
On 19-10-17 08:24, Schrempf Frieder wrote:
> Hi Marco,
>
> On 17.10.19 10:14, Marco Felsch wrote:
> > Hi Frieder,
> >
> > On 19-10-16 15:06, Schrempf Frieder wrote:
> >> From: Frieder Schrempf <[email protected]>
> >>
> >> In order to support more of the i.MX6UL/ULL-based SoMs and boards by
> >> Kontron Electronics GmbH, we restructure the devicetrees to share common
> >> parts and add new devicetrees for the missing boards.
> >>
> >> Currently there are the following SoM flavors:
> >> * N6310: SoM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
> >> * N6311: SoM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND (new)
> >> * N6411: SoM with i.MX6ULL, 512MB RAM, 512MB SPI NAND (new)
> >>
> >> Each of the SoMs also features 1MB SPI NOR and an Ethernet PHY. The carrier
> >> board for the evalkit is the same for all SoMs.
> >>
> >> Frieder Schrempf (10):
> >> ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate
> >> file
> >> ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
> >> ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
> >> ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S'
> >> and 'N6411 S'
> >> ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
> >> ARM: dts: imx6ul-kontron-n6x1x-s: Specify bus-width for SD card and
> >> eMMC
> >> ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent
> >> polarity to usb nodes
> >> ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix
> >> indentation
> >> dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
> >> MAINTAINERS: Add an entry for Kontron Electronics ARM board support
> >
> > Did you send all patches to same To: and Cc:?
>
> No, I have a script that runs get_maintainer.pl for each patch. So the
> recipients might differ. I only had Krzysztof and Rob as hard-coded
> recipients for the whole series.
>
> Do you think I should change this so each recipient receives the whole
> series?
I do it that way because sometimes it is better for the reviewer to see
the whole context.
Regards,
Marco
> Thanks,
> Frieder
>
> >
> > Regards,
> > Marco
> >
> >>
> >> .../devicetree/bindings/arm/fsl.yaml | 14 +
> >> MAINTAINERS | 6 +
> >> arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
> >> .../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +---
> >> arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts | 16 +
> >> .../boot/dts/imx6ul-kontron-n6311-som.dtsi | 40 ++
> >> arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 422 ++++++++++++++++++
> >> .../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 129 ++++++
> >> arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts | 16 +
> >> .../boot/dts/imx6ull-kontron-n6411-som.dtsi | 40 ++
> >> 10 files changed, 685 insertions(+), 498 deletions(-)
> >> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts
> >> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
> >> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
> >> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
> >> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts
> >> create mode 100644 arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
> >>
> >> --
> >> 2.17.1
> >>
> >>
> >
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Marco,
On 21.10.19 13:43, Marco Felsch wrote:
> Hi Frieder,
>
> On 19-10-17 08:24, Schrempf Frieder wrote:
>> Hi Marco,
>>
>> On 17.10.19 10:14, Marco Felsch wrote:
>>> Hi Frieder,
>>>
>>> On 19-10-16 15:06, Schrempf Frieder wrote:
>>>> From: Frieder Schrempf <[email protected]>
>>>>
>>>> In order to support more of the i.MX6UL/ULL-based SoMs and boards by
>>>> Kontron Electronics GmbH, we restructure the devicetrees to share common
>>>> parts and add new devicetrees for the missing boards.
>>>>
>>>> Currently there are the following SoM flavors:
>>>> * N6310: SoM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
>>>> * N6311: SoM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND (new)
>>>> * N6411: SoM with i.MX6ULL, 512MB RAM, 512MB SPI NAND (new)
>>>>
>>>> Each of the SoMs also features 1MB SPI NOR and an Ethernet PHY. The carrier
>>>> board for the evalkit is the same for all SoMs.
>>>>
>>>> Frieder Schrempf (10):
>>>> ARM: dts: imx6ul-kontron-n6310: Move common SoM nodes to a separate
>>>> file
>>>> ARM: dts: Add support for two more Kontron SoMs N6311 and N6411
>>>> ARM: dts: imx6ul-kontron-n6310-s: Move common nodes to a separate file
>>>> ARM: dts: Add support for two more Kontron evalkit boards 'N6311 S'
>>>> and 'N6411 S'
>>>> ARM: dts: imx6ul-kontron-n6x1x: Add 'chosen' node with 'stdout-path'
>>>> ARM: dts: imx6ul-kontron-n6x1x-s: Specify bus-width for SD card and
>>>> eMMC
>>>> ARM: dts: imx6ul-kontron-n6x1x-s: Add vbus-supply and overcurrent
>>>> polarity to usb nodes
>>>> ARM: dts: imx6ul-kontron-n6x1x-s: Remove an obsolete comment and fix
>>>> indentation
>>>> dt-bindings: arm: fsl: Add more Kontron i.MX6UL/ULL compatibles
>>>> MAINTAINERS: Add an entry for Kontron Electronics ARM board support
>>>
>>> Did you send all patches to same To: and Cc:?
>>
>> No, I have a script that runs get_maintainer.pl for each patch. So the
>> recipients might differ. I only had Krzysztof and Rob as hard-coded
>> recipients for the whole series.
>>
>> Do you think I should change this so each recipient receives the whole
>> series?
>
> I do it that way because sometimes it is better for the reviewer to see
> the whole context.
Sounds reasonable. Thanks for the feedback.
Sometimes it just feels like it will cause a lot of useless mail traffic
when sending all patches to all people suggested by get_maintainer.pl,
but in general I agree, it is definitely useful to receive all the
context. I might have to tweak my get_maintainer arguments, to trim the
list of recipients and then send the whole series to these people.
Thanks,
Frieder
On 21.10.19 12:28, [email protected] wrote:
> On Wed, Oct 16, 2019 at 03:07:19PM +0000, Schrempf Frieder wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> The Kontron N6311 and N6411 SoMs are very similar to N6310. In
>> preparation to add support for them, we move the common nodes to a
>> separate file imx6ul-kontron-n6x1x-som-common.dtsi.
>>
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> .../boot/dts/imx6ul-kontron-n6310-som.dtsi | 95 +-------------
>> .../dts/imx6ul-kontron-n6x1x-som-common.dtsi | 123 ++++++++++++++++++
>> 2 files changed, 124 insertions(+), 94 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
>>
>> diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
>> index a896b2348dd2..47d3ce5d255f 100644
>> --- a/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
>> +++ b/arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
>> @@ -6,7 +6,7 @@
>> */
>>
>> #include "imx6ul.dtsi"
>> -#include <dt-bindings/gpio/gpio.h>
>> +#include "imx6ul-kontron-n6x1x-som-common.dtsi"
>>
>> / {
>> model = "Kontron N6310 SOM";
>> @@ -18,49 +18,7 @@
>> };
>> };
>>
>> -&ecspi2 {
>> - cs-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
>> - pinctrl-names = "default";
>> - pinctrl-0 = <&pinctrl_ecspi2>;
>> - status = "okay";
>> -
>> - spi-flash@0 {
>> - compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
>> - spi-max-frequency = <50000000>;
>> - reg = <0>;
>> - };
>> -};
>> -
>> -&fec1 {
>> - pinctrl-names = "default";
>> - pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
>> - phy-mode = "rmii";
>> - phy-handle = <ðphy1>;
>> - status = "okay";
>> -
>> - mdio {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - ethphy1: ethernet-phy@1 {
>> - reg = <1>;
>> - micrel,led-mode = <0>;
>> - clocks = <&clks IMX6UL_CLK_ENET_REF>;
>> - clock-names = "rmii-ref";
>> - };
>> - };
>> -};
>> -
>> -&fec2 {
>> - phy-mode = "rmii";
>> - status = "disabled";
>> -};
>> -
>> &qspi {
>> - pinctrl-names = "default";
>> - pinctrl-0 = <&pinctrl_qspi>;
>> - status = "okay";
>> -
>> spi-flash@0 {
>
> You left qspi and flash partitions here, while adding it later. It is
> not pure move then and some duplicated stuff remains.
Indeed, the spi-flash node is duplicated, as I forgot to remove it from
the common include file. I will change that.
Hi Krzysztof,
On 21.10.19 12:38, [email protected] wrote:
> On Wed, Oct 16, 2019 at 03:07:25PM +0000, Schrempf Frieder wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> The baseboard for the Kontron N6310 SoM is also used for other SoMs
>> such as N6311 and N6411. In order to share the code, we move the
>> definitions of the baseboard to a separate dtsi file.
>>
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts | 405 +----------------
>> arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi | 412 ++++++++++++++++++
>> 2 files changed, 413 insertions(+), 404 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
>>
[...]
>> diff --git a/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
>> new file mode 100644
>> index 000000000000..08a326ce2cbe
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
>> @@ -0,0 +1,412 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2017 exceet electronics GmbH
>> + * Copyright (C) 2018 Kontron Electronics GmbH
>> + * Copyright (c) 2019 Krzysztof Kozlowski <[email protected]>
>> + */
>> +
>
> This file does not include anything else but uses defines (GPIO flags,
> clocks, pins). Usually sources should not rely on inclusions coming from
> unrelated files so here you should include necessary headers. In case of
> future refactorings or reuse one might not know which defines you wanted
> to use (in other platforms for example there might be multiple defines
> in multiple header files with same name).
Right, I need to include the proper headers here. I will also check the
other files.
Thanks for reviewing!
Frieder
On Wed, 16 Oct 2019 15:07:36 +0000, Schrempf Frieder wrote:
>
> From: Frieder Schrempf <[email protected]>
>
> Add the compatibles for Kontron i.MX6UL N6311 SoM and boards and
> the compatibles for Kontron i.MX6ULL N6411 SoM and boards.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
Reviewed-by: Rob Herring <[email protected]>