2020-07-29 12:21:25

by Guido Günther

Subject: [PATCH v1 0/3] arm64: dts: imx8mq: Add NWL DSI host controller to Librem 5 Devkit

These patches add the NWL host controller to the imx8mq and make use of it on
the Librem 5 Devkit enabling the built in MIPI DSI LCD panel.

I opted to add imx8mq internal ports and endpoints between nwl and lcdif to the
generic dtsi since those are SOC rather than board specific properties.

Guido Günther (3):
arm64: dts: imx8mq: Add NWL MIPI DSI controller
arm64: dts: imx8mq-librem5-devkit: Enable the LCD panel
arm64: defconfig: Enable imx8mq-librem5-devkit display stack

.../dts/freescale/imx8mq-librem5-devkit.dts | 33 +++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 49 +++++++++++++++++++
arch/arm64/configs/defconfig | 6 ++-
3 files changed, 87 insertions(+), 1 deletion(-)

--
2.26.2

2020-07-29 12:22:13

by Guido Günther

Subject: [PATCH v1 1/3] arm64: dts: imx8mq: Add NWL MIPI DSI controller

Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
default. This also adds the necessary port to LCDIF.

Signed-off-by: Guido Günther <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 49 +++++++++++++++++++++++
1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index f70435cf9ad5..e5fa77e1dfe7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -523,6 +523,12 @@ lcdif: lcd-controller@30320000 {
<&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rates = <0>, <0>, <0>, <594000000>;
status = "disabled";
+
+ port@0 {
+ lcdif_mipi_dsi: endpoint {
+ remote-endpoint = <&mipi_dsi_lcdif_in>;
+ };
+ };
};

iomuxc: pinctrl@30330000 {
@@ -899,6 +905,49 @@ sec_jr2: jr@3000 {
};
};

+ mipi_dsi: mipi-dsi@30a00000 {
+ compatible = "fsl,imx8mq-nwl-dsi";
+ reg = <0x30a00000 0x300>;
+ clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
+ <&clk IMX8MQ_CLK_DSI_AHB>,
+ <&clk IMX8MQ_CLK_DSI_IPG_DIV>,
+ <&clk IMX8MQ_CLK_DSI_PHY_REF>,
+ <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
+ clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
+ assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB>,
+ <&clk IMX8MQ_CLK_DSI_CORE>,
+ <&clk IMX8MQ_CLK_DSI_IPG_DIV>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>,
+ <&clk IMX8MQ_SYS1_PLL_266M>;
+ assigned-clock-rates = <80000000>, <266000000>, <20000000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ mux-controls = <&mux 0>;
+ power-domains = <&pgc_mipi>;
+ phys = <&dphy>;
+ phy-names = "dphy";
+ resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
+ <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
+ <&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
+ <&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
+ reset-names = "byte", "dpi", "esc", "pclk";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_dsi_lcdif_in: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&lcdif_mipi_dsi>;
+ };
+ };
+ };
+ };
+
dphy: dphy@30a00300 {
compatible = "fsl,imx8mq-mipi-dphy";
reg = <0x30a00300 0x100>;
--
2.26.2

2020-08-20 04:04:25

by Fabio Estevam

Subject: Re: [PATCH v1 1/3] arm64: dts: imx8mq: Add NWL MIPI DSI controller

Hi Guido,

On Wed, Jul 29, 2020 at 9:19 AM Guido Günther <[email protected]> wrote:
>
> Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by
> default. This also adds the necessary port to LCDIF.
>
> Signed-off-by: Guido Günther <[email protected]>

Reviewed-by: Fabio Estevam <[email protected]>