2021-11-19 12:37:39

by Prabhakar Mahadev Lad

Subject: [PATCH] arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash

Enable mt25qu512a flash connected to QSPI0.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
---
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 7e84a29dddfa..e53c17954566 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -178,6 +178,18 @@
line-name = "gpio_sd0_pwr_en";
};

+ qspi_pins0: qspi0 {
+ qspi0-data {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
+ power-source = <1800>;
+ };
+
+ qspi0-ctrl {
+ pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
+ power-source = <1800>;
+ };
+ };
+
/*
* SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
* The below switch logic can be used to select the device between
@@ -243,6 +255,34 @@
};
};

+&sbc {
+ pinctrl-0 = <&qspi_pins0>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "micron,mt25qu512a", "jedec,spi-nor";
+ reg = <0>;
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ boot@0 {
+ reg = <0x00000000 0x2000000>;
+ read-only;
+ };
+ user@2000000 {
+ reg = <0x2000000 0x2000000>;
+ };
+ };
+ };
+};
+
#if SDHI
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
--
2.17.1

2021-11-19 16:10:05

by Sergey Shtylyov

Subject: Re: [PATCH] arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash

Hello!

On 19.11.2021 15:37, Lad Prabhakar wrote:

> Enable mt25qu512a flash connected to QSPI0.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Biju Das <[email protected]>
> ---
> .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 40 +++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> index 7e84a29dddfa..e53c17954566 100644
> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> @@ -178,6 +178,18 @@
> line-name = "gpio_sd0_pwr_en";
> };
>
> + qspi_pins0: qspi0 {

Not qspi0_pins:?

[...]

MBR, Sergey

2021-11-19 16:13:11

by Lad, Prabhakar

Subject: Re: [PATCH] arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash

Hi Sergey,

Thank you for the review.

On Fri, Nov 19, 2021 at 4:10 PM Sergey Shtylyov <[email protected]> wrote:
>
> Hello!
>
> On 19.11.2021 15:37, Lad Prabhakar wrote:
>
> > Enable mt25qu512a flash connected to QSPI0.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Biju Das <[email protected]>
> > ---
> > .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 40 +++++++++++++++++++
> > 1 file changed, 40 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > index 7e84a29dddfa..e53c17954566 100644
> > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > @@ -178,6 +178,18 @@
> > line-name = "gpio_sd0_pwr_en";
> > };
> >
> > + qspi_pins0: qspi0 {
>
> Not qspi0_pins:?
>
good catch, will fix that and send a v2.

Cheers,
Prabhakar

> [...]
>
> MBR, Sergey

2021-11-19 16:19:39

by Geert Uytterhoeven

Subject: Re: [PATCH] arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash

Hi Sergey,

On Fri, Nov 19, 2021 at 5:10 PM Sergey Shtylyov <[email protected]> wrote:
> On 19.11.2021 15:37, Lad Prabhakar wrote:
> > Enable mt25qu512a flash connected to QSPI0.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Biju Das <[email protected]>
> > ---
> > .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 40 +++++++++++++++++++
> > 1 file changed, 40 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > index 7e84a29dddfa..e53c17954566 100644
> > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> > @@ -178,6 +178,18 @@
> > line-name = "gpio_sd0_pwr_en";
> > };
> >
> > + qspi_pins0: qspi0 {
>
> Not qspi0_pins:?

It's a subnode of "pfc", and all other subnodes don't have a "_pins"
suffix. Same for the other boards.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds