Date: Tue, 13 Nov 2012 07:41:36 +0100
From: Thierry Reding <thierry.reding@avionic-design.de>
To: Mark Zhang <markz@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
        "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] ARM: tegra: Add Tegra20 host1x support
Message-ID: <20121113064135.GA31443@avionic-0098.mockup.avionic-design.de>
References: <1352467202-27903-1-git-send-email-thierry.reding@avionic-design.de>
 <1352467202-27903-2-git-send-email-thierry.reding@avionic-design.de>
 <50A0C3BF.90509@nvidia.com>
 <50A1CECA.3090804@nvidia.com>
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On Tue, Nov 13, 2012 at 12:38:34PM +0800, Mark Zhang wrote:
> On 11/12/2012 05:39 PM, Mark Zhang wrote:
> > On 11/09/2012 09:20 PM, Thierry Reding wrote:
[...]
> >> @@ -1036,9 +1041,6 @@ static struct clk_duplicate tegra_clk_duplicates=
[] =3D {
> >>         CLK_DUPLICATE("usbd",   "utmip-pad",    NULL),
> >>         CLK_DUPLICATE("usbd",   "tegra-ehci.0", NULL),
> >>         CLK_DUPLICATE("usbd",   "tegra-otg",    NULL),
> >> -       CLK_DUPLICATE("hdmi",   "tegradc.0",    "hdmi"),
> >> -       CLK_DUPLICATE("hdmi",   "tegradc.1",    "hdmi"),
> >> -       CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"),
> >>         CLK_DUPLICATE("2d",     "tegra_grhost", "gr2d"),
> >>         CLK_DUPLICATE("3d",     "tegra_grhost", "gr3d"),
> >>         CLK_DUPLICATE("epp",    "tegra_grhost", "epp"),
> >> @@ -1051,6 +1053,9 @@ static struct clk_duplicate tegra_clk_duplicates=
[] =3D {
> >>         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.1", "fast-clk"),
> >>         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
> >>         CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
> >> +       CLK_DUPLICATE("pll_p", "tegra-dc.0", "parent"),
> >> +       CLK_DUPLICATE("pll_p", "tegra-dc.1", "parent"),
> >> +       CLK_DUPLICATE("pll_d_out0", "tegra-hdmi", "parent"),
> >>  };
>=20
> Why we need this "CLK_DUPLICATE"? Set the clock parent of the dc
> controllers to pll_p?

This was the method proposed by Stephen to abstract away the clock tree
differences between Tegra20 and Tegra30. The way this works is that we
can {devm_,}clk_get(&pdev->dev, "parent") in the display and HDMI
controllers' .probe() and it'll obtain the correct parent clock
independent of which version of Tegra is used.

Thierry

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