Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759464Ab3DDL5n (ORCPT ); Thu, 4 Apr 2013 07:57:43 -0400 Received: from cantor2.suse.de ([195.135.220.15]:36158 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759074Ab3DDL5l convert rfc822-to-8bit (ORCPT ); Thu, 4 Apr 2013 07:57:41 -0400 Subject: Re: [PATCH RFC] kvm: add PV MMIO EVENTFD Mime-Version: 1.0 (Apple Message framework v1278) Content-Type: text/plain; charset=us-ascii From: Alexander Graf In-Reply-To: <20130404104846.GA6227@redhat.com> Date: Thu, 4 Apr 2013 13:57:34 +0200 Cc: Marcelo Tosatti , Gleb Natapov , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Xiao Guangrong , Takuya Yoshikawa , Alex Williamson , Will Deacon , Christoffer Dall , Sasha Levin , Andrew Morton , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, virtualization@lists.linux-foundation.org Content-Transfer-Encoding: 8BIT Message-Id: <6D40C5F1-849E-4F32-B391-E1A1BFA8C59D@suse.de> References: <20130404104846.GA6227@redhat.com> To: "Michael S. Tsirkin" X-Mailer: Apple Mail (2.1278) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1848 Lines: 42 On 04.04.2013, at 12:50, Michael S. Tsirkin wrote: > With KVM, MMIO is much slower than PIO, due to the need to > do page walk and emulation. But with EPT, it does not have to be: we > know the address from the VMCS so if the address is unique, we can look > up the eventfd directly, bypassing emulation. > > Add an interface for userspace to specify this per-address, we can > use this e.g. for virtio. > > The implementation adds a separate bus internally. This serves two > purposes: > - minimize overhead for old userspace that does not use PV MMIO > - minimize disruption in other code (since we don't know the length, > devices on the MMIO bus only get a valid address in write, this > way we don't need to touch all devices to teach them handle > an dinvalid length) > > At the moment, this optimization is only supported for EPT on x86 and > silently ignored for NPT and MMU, so everything works correctly but > slowly. > > TODO: NPT, MMU and non x86 architectures. > > The idea was suggested by Peter Anvin. Lots of thanks to Gleb for > pre-review and suggestions. > > Signed-off-by: Michael S. Tsirkin This still uses page fault intercepts which are orders of magnitudes slower than hypercalls. Why don't you just create a PV MMIO hypercall that the guest can use to invoke MMIO accesses towards the host based on physical addresses with explicit length encodings? That way you simplify and speed up all code paths, exceeding the speed of PIO exits even. It should also be quite easily portable, as all other platforms have hypercalls available as well. Alex -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/