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From: "Benjamin Herrenschmidt" <benh@kernel.crashing.org>
To: "Justin T. Gibbs" <gibbs@scsiguy.com>,
       "Marcelo Tosatti" <marcelo@conectiva.com.br>
Cc: lkml <linux-kernel@vger.kernel.org>
Subject: Re: 2.4.20pre7, aic7xxx-6.2.8: Panic: HOST_MSG_LOOP with invalid
 SCB 0
Date: Mon, 23 Sep 2002 09:15:42 +0200
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>No, it is not write posting.  It is usually a problem with write
>combining/merging and or read prefetch on devices that do not
>support this feature.  The memory BAR on the aic7xxx chips does
>not have the PREFETCH bit set so these types of operations are
>forbidden by the spec.  The end result are missed writes and
>state read data leading to all kinds of driver confusion.
>
>Often these issues are really register layout dependent.  If
>you never have to access two registers that are right next to
>each other, the chipset can't write combine, etc.

Ok, well. Indeed, adding a read on all writes may help here.
Does this affect the performances significantly ?

Ben.


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