Date: Wed, 24 Apr 2013 11:30:38 -0500
From: Jacob Shin <jacob.shin@amd.com>
To: Will Deacon <will.deacon@arm.com>
CC: Ingo Molnar <mingo@redhat.com>, Oleg Nesterov <oleg@redhat.com>,
        Frederic Weisbecker <fweisbec@gmail.com>,
        Peter Zijlstra <a.p.zijlstra@chello.nl>,
        Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
        "H. Peter Anvin" <hpa@zytor.com>, Thomas Gleixner <tglx@linutronix.de>,
        "x86@kernel.org" <x86@kernel.org>,
        Stephane Eranian <eranian@google.com>, Jiri Olsa <jolsa@redhat.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2 1/4] perf: Add hardware breakpoint address mask
Message-ID: <20130424163038.GA29816@jshin-Toonie>
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 <20130423143423.GB17021@jshin-Toonie>
 <20130423144057.GA19644@jshin-Toonie>
 <20130423150240.GD18616@mudshark.cambridge.arm.com>
 <20130423151846.GA22052@jshin-Toonie>
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On Wed, Apr 24, 2013 at 10:48:53AM +0100, Will Deacon wrote:
> On Tue, Apr 23, 2013 at 04:18:46PM +0100, Jacob Shin wrote:
> > On Tue, Apr 23, 2013 at 04:02:40PM +0100, Will Deacon wrote:
> > > On Tue, Apr 23, 2013 at 03:40:57PM +0100, Jacob Shin wrote:
> > > > >   perf stat -e mem:0x1000/0xf:w a.out
> > > 
> > > Are you saying that this command would count any write to:
> > > 
> > > 	0x1000
> > > 	0x1001
> > > 	...
> > > 	0x100e
> > > 	0x100f
> > > 
> > > ?
> > > 
> > > If so, that differs from the ARM debug architecture in that the mask is called
> > > `byte-address-select', so a mask of 0b1001 would count accesses at +0 bytes
> > > and +3 bytes from the base address. Is that possible to describe with your
> > > masking scheme and a single watchpoint?
> > > 
> > > A mask of 0xf, would count +0, +1, +2 and +3 (essentially bp_len == 4).
> > > 
> > > Unfortunately, that means I can't just invert the mask like I originally
> > > thought.
> > 
> > Ah, .. that is different .
> > 
> > Our hardware matches on the breakpoint if:
> > 
> >   (physical_address & ~bp_addr_mask) == (bp_addr & ~bp_addr_mask)
> > 
> > In other words, the mask says which of the bp_addr bits hardware should
> > ignore when matching.
> > 
> > .. it would be great if we can come up with userland interface that works
> > for both archs. I'm coming up empty at the moment ..
> 
> After a bit of thought, I *think* the ARM mechanism is more expressive, and
> you could describe your masking in terms of byte-address-select. The
> downside is that we'd end up with much larger masks, which could be argued
> as counter-intuitive from a user's point of view.

Hm .. Oleg, any thoughts on this?

bp_addr is encoded into attr.config1 and bp_len in attr.config2. I'm not
sure if attr.config is being used or not, but if not, we could say that
architecture specific "stuff" goes into attr.config.

And in perf tools:

  perf stat -e mem:0x1000/0xf:w a.out

Will just translate into setting attr.config = 0xf. And only x86
hw_breakpoint will know what .config = 0xf means for x86 and do the right
thing. For ARM, 0xf will mean something different.

The downside is that in userland perf tool we need differing documentation
on what the mask syntax means for each architecture.

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