Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758558Ab3DXWi1 (ORCPT ); Wed, 24 Apr 2013 18:38:27 -0400 Received: from va3ehsobe004.messaging.microsoft.com ([216.32.180.14]:29255 "EHLO va3outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757045Ab3DXWiZ convert rfc822-to-8bit (ORCPT ); Wed, 24 Apr 2013 18:38:25 -0400 X-Forefront-Antispam-Report: CIP:70.37.183.190;KIP:(null);UIP:(null);IPV:NLI;H:mail.freescale.net;RD:none;EFVD:NLI X-SpamScore: -4 X-BigFish: VS-4(zzbb2dI98dI9371I1432Izz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839h944hd2bhf0ah1288h12a5h12a9h12bdh137ah139eh13b6h1441h1504h1537h162dh1631h16a6h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1155h) Date: Wed, 24 Apr 2013 17:38:16 -0500 From: Scott Wood Subject: Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500 To: Zhao Chenhui CC: , , In-Reply-To: <20130424112929.GC3172@localhost.localdomain> (from chenhui.zhao@freescale.com on Wed Apr 24 06:29:29 2013) X-Mailer: Balsa 2.4.12 Message-ID: <1366843096.17465.17@snotra> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed Content-Disposition: inline Content-Transfer-Encoding: 8BIT X-OriginatorOrg: freescale.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3403 Lines: 102 On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote: > On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote: > > On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote: > > >From: Chen-Hui Zhao > > > > > >For e6500, two threads in one core share one time base. Just need > > >to do time base sync on first thread of one core, and skip it on > > >the other thread. > > > > > >Signed-off-by: Zhao Chenhui > > >Signed-off-by: Li Yang > > >Signed-off-by: Andy Fleming > > >--- > > > arch/powerpc/platforms/85xx/smp.c | 52 > > >+++++++++++++++++++++++++++++++----- > > > 1 files changed, 44 insertions(+), 8 deletions(-) > > > > > >diff --git a/arch/powerpc/platforms/85xx/smp.c > > >b/arch/powerpc/platforms/85xx/smp.c > > >index 74d8cde..5f3eee3 100644 > > >--- a/arch/powerpc/platforms/85xx/smp.c > > >+++ b/arch/powerpc/platforms/85xx/smp.c > > >@@ -26,6 +26,7 @@ > > > #include > > > #include > > > #include > > >+#include > > > > > > #include > > > #include > > >@@ -45,6 +46,7 @@ static u64 timebase; > > > static int tb_req; > > > static int tb_valid; > > > static u32 cur_booting_core; > > >+static bool rcpmv2; > > > > > > #ifdef CONFIG_PPC_E500MC > > > /* get a physical mask of online cores and booting core */ > > >@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void) > > > u32 mask; > > > int cpu; > > > > > >- mask = 1 << cur_booting_core; > > >- for_each_online_cpu(cpu) > > >- mask |= 1 << get_hard_smp_processor_id(cpu); > > >+ if (smt_capable()) { > > >+ /* two threads in one core share one time base */ > > >+ mask = 1 << cpu_core_index_of_thread(cur_booting_core); > > >+ for_each_online_cpu(cpu) > > >+ mask |= 1 << cpu_core_index_of_thread( > > >+ get_hard_smp_processor_id(cpu)); > > >+ } else { > > >+ mask = 1 << cur_booting_core; > > >+ for_each_online_cpu(cpu) > > >+ mask |= 1 << get_hard_smp_processor_id(cpu); > > >+ } > > > > Where is smt_capable defined()? I assume somewhere in the patchset > > but it's a pain to search 12 patches... > > > > It is defined in arch/powerpc/include/asm/topology.h. > #define smt_capable() (cpu_has_feature(CPU_FTR_SMT)) > > Thanks for your review again. We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim that feature yet, except in our SDK kernel. That doesn't change the topology of CPU numbering. > > Is this really about whether we're SMT-capable or whether we have > > rcpm v2? > > > > -Scott > > I think this "if" statement can be removed. The > cpu_core_index_of_thread() > can return the correct cpu number with thread or without thread. > > Like this: > static inline u32 get_phy_cpu_mask(void) > { > u32 mask; > int cpu; > > mask = 1 << cpu_core_index_of_thread(cur_booting_core); > for_each_online_cpu(cpu) > mask |= 1 << cpu_core_index_of_thread( > get_hard_smp_processor_id(cpu)); > > return mask; > } Likewise, this will get it wrong if SMT is disabled or not yet implemented on a core. -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/