Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932130Ab3D2RxB (ORCPT ); Mon, 29 Apr 2013 13:53:01 -0400 Received: from mail-ob0-f169.google.com ([209.85.214.169]:32971 "EHLO mail-ob0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932090Ab3D2Rw7 (ORCPT ); Mon, 29 Apr 2013 13:52:59 -0400 MIME-Version: 1.0 In-Reply-To: References: <1367003005-5560-1-git-send-email-keescook@chromium.org> <1367003005-5560-3-git-send-email-keescook@chromium.org> <517AF5D6.1040800@zytor.com> <517AFC38.5090500@zytor.com> Date: Mon, 29 Apr 2013 10:52:58 -0700 X-Google-Sender-Auth: onE6MUGL3JZ4Y7QtgHIu_3CqLb0 Message-ID: Subject: Re: [PATCH 2/6] x86: kaslr: move CPU flags out of cpucheck From: Kees Cook To: "H. Peter Anvin" Cc: LKML , "kernel-hardening@lists.openwall.com" , Thomas Gleixner , Ingo Molnar , "x86@kernel.org" , Jarkko Sakkinen , Matthew Garrett , Matt Fleming , Eric Northup , Dan Rosenberg , Julien Tinnes , Will Drewry Content-Type: text/plain; charset=ISO-8859-1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1881 Lines: 60 On Mon, Apr 29, 2013 at 10:49 AM, Kees Cook wrote: > On Fri, Apr 26, 2013 at 3:14 PM, H. Peter Anvin wrote: >> On 04/26/2013 02:47 PM, H. Peter Anvin wrote: >>> On 04/26/2013 12:03 PM, Kees Cook wrote: >>>> + >>>> +static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d) >>>> +{ >>>> + /* Handle x86_32 PIC using ebx. */ >>>> + asm volatile("movl %%ebx, %%edi \n\t" >>>> + "cpuid \n\t" >>>> + "xchgl %%edi, %%ebx\n\t" >>>> + : "=a" (*a), >>>> + "=D" (*b), >>>> + "=c" (*c), >>>> + "=d" (*d) >>>> + : "a" (id) >>>> + ); >>>> +} >>> >>> Please don't constrain registers unnecessarily. >>> >>> You can use "=r" there and let gcc assign whatever free register it pleases. >>> >>> You can also limit that to only: >>> >>> #if defined(__i386__) && defined(__PIC__) >>> >> >> How is this for a "beauty": >> >> >> #if defined(__i386__) && defined (__PIC__) >> # define EBX_REG "=r" >> #else >> # define EBX_REG "=b" >> #endif >> >> asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif ; " >> "cpuid ; " >> ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif" >> : "=a" (*a), "=c" (*c), "=d" (*d), >> EBX_REG (*b) >> : "a" (leaf), "c" (subleaf)); >> > > Oh, very nice on the ifnc and register define! Is the leaf/subleaf > stuff needed there? That piece doesn't make sense to me. Ah, nevermind, I just need the "leaf" bit for the cpuid input. Thanks! -Kees -- Kees Cook Chrome OS Security -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/