Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756801Ab3ENIds (ORCPT ); Tue, 14 May 2013 04:33:48 -0400 Received: from mx0.aculab.com ([213.249.233.131]:54647 "HELO mx0.aculab.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1756592Ab3ENIdp (ORCPT ); Tue, 14 May 2013 04:33:45 -0400 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Subject: RE: [PATCHv2 net 1/2] sfc: Delete EFX_PAGE_IP_ALIGN, equivalent to NET_IP_ALIGN Date: Tue, 14 May 2013 09:32:18 +0100 Message-ID: In-Reply-To: <1368482311.3305.48.camel@bwh-desktop.uk.solarflarecom.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCHv2 net 1/2] sfc: Delete EFX_PAGE_IP_ALIGN, equivalent to NET_IP_ALIGN Thread-Index: Ac5QJQLiCik5nL1SQDaANYIdtgNHqQAV5bvA References: <1368482311.3305.48.camel@bwh-desktop.uk.solarflarecom.com> From: "David Laight" To: "Ben Hutchings" , "David Miller" , "Heiko Carstens" , "Geert Uytterhoeven" Cc: , "Linux Kernel Development" , , "netdev" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id r4E8XsK6006204 Content-Length: 721 Lines: 17 > The two architectures that define CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS > (powerpc and x86) now both define NET_IP_ALIGN as 0, so there is no > need for this optimisation any more. Hmmm.... even on x86 there will be a measurable cost in misaligned accesses - at least for some workloads. If the DMA is able to write to a mis-aligned buffer and still perform aligned burst transfers mid-frame then 4n+2 aligning the rx buffer should be a win even on x86. Note to hardware engineers: add an option to write two bytes of junk before the rx data :-) David ????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m???? ????????I?