Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756112Ab3FGPVE (ORCPT ); Fri, 7 Jun 2013 11:21:04 -0400 Received: from mail-qc0-f181.google.com ([209.85.216.181]:52379 "EHLO mail-qc0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753982Ab3FGPVB convert rfc822-to-8bit (ORCPT ); Fri, 7 Jun 2013 11:21:01 -0400 MIME-Version: 1.0 In-Reply-To: <201306071427.20512.heiko@sntech.de> References: <201306062107.58875.heiko@sntech.de> <201306062108.38587.heiko@sntech.de> <201306071427.20512.heiko@sntech.de> Date: Fri, 7 Jun 2013 23:21:00 +0800 Message-ID: Subject: Re: [PATCH v2 1/8] clk: flag to use upper half of the register as change indicator From: Haojian Zhuang To: =?ISO-8859-1?Q?Heiko_St=FCbner?= Cc: Linus Walleij , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Mike Turquette , Seungwon Jeon , Jaehoon Chung , Chris Ball , "linux-mmc@vger.kernel.org" , Grant Likely , Rob Herring , "devicetree-discuss@lists.ozlabs.org" , Russell King , Arnd Bergmann , Olof Johansson , Thomas Petazzoni Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2152 Lines: 57 On 7 June 2013 20:27, Heiko St?bner wrote: > Am Freitag, 7. Juni 2013, 13:46:32 schrieb Linus Walleij: >> On Thu, Jun 6, 2013 at 9:08 PM, Heiko St?bner wrote: >> > There exist platforms, namely at least all Rockchip Cortex-A9 based ones, >> > that don't use the paradigm of reading-changing-writing the register >> > contents, but instead only write the changes to the register with a mask >> > that indicates the changed bits. >> > >> > This patch adds flags and code to support the case where the lower 16 bit >> > of hold the information and the upper 16 bit are used as mask to >> > indicate the written changes. >> > >> > As hardware-specific flags should not be added to the common clk flags, >> > the flags are added to gate, mux and divider clocks individually. >> > >> > Signed-off-by: Heiko Stuebner >> >> (...) >> >> > + if ((clk_gate_flags & CLK_GATE_MASK_UPPER_HALF) && bit_idx > 15) >> > { + pr_err("%s: bit_idx %d invalid\n", __func__, bit_idx); >> > + return ERR_PTR(-EINVAL); >> > + } >> >> Now this looks *EXTREMELY* familiar to a patch just sent by Haojian >> for HiSilicon. >> >> "[PATCH v2 3/6] clk: divider: add CLK_DIVIDER_HIWORD_MASK flag" >> http://marc.info/?l=linux-arm-kernel&m=137035873916777&w=2 >> >> What kind of coincidence is this? Are Rockchip and HiSilicon using >> the same silicon IP or are they of a common origin? (It is a small >> world after all.) > > Now this is really interesting :-) and the handling really seems to follow the > same pattern. > > >> I think you two guys need to read each others patch sets closely >> here. I'd like Haojian to look at Heiko's patches and Heiko to look >> at Haojian's patches, just to make sure you're not actually writing >> two drivers for the same hardware in the end. > > I'll take a look > > > Heiko Me too :) Regards Haojian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/