Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760149Ab3GZWMf (ORCPT ); Fri, 26 Jul 2013 18:12:35 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:1377 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755891Ab3GZWMc convert rfc822-to-8bit (ORCPT ); Fri, 26 Jul 2013 18:12:32 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 26 Jul 2013 15:12:32 -0700 From: Andrew Chew To: Stephen Warren CC: "rob.herring@calxeda.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ian.campbell@citrix.com" , "rob@landley.net" , "sameo@linux.intel.com" , "lee.jones@linaro.org" , "grant.likely@linaro.org" , "ian@slimlogic.co.uk" , "j-keerthy@ti.com" , "gg@slimlogic.co.uk" , Laxman Dewangan , Rhyland Klein , "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" Date: Fri, 26 Jul 2013 15:12:31 -0700 Subject: RE: [PATCH] mfd: palmas: Add DVFS mux setting Thread-Topic: [PATCH] mfd: palmas: Add DVFS mux setting Thread-Index: Ac6KS/X0FiU29TJ+S1qMwrvFDOyarAAAC49w Message-ID: <643E69AA4436674C8F39DCC2C05F763862A1274137@HQMAIL03.nvidia.com> References: <1374871308-490-1-git-send-email-achew@nvidia.com> <51F2E74E.2060107@wwwdotorg.org> <643E69AA4436674C8F39DCC2C05F763862A12740FB@HQMAIL03.nvidia.com> <51F2EC66.2080200@wwwdotorg.org> <643E69AA4436674C8F39DCC2C05F763862A1274113@HQMAIL03.nvidia.com> <51F2F22B.500@wwwdotorg.org> In-Reply-To: <51F2F22B.500@wwwdotorg.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2670 Lines: 55 > >>>> How does this interact with the pinctrl driver that Laxman just > >>>> sent for Palmas? > >>>> > >>>> https://lkml.org/lkml/2013/7/26/141 > >>>> [PATCH 0/2] pinctrl: palmas: add pincontrol driver > >>> > >>> Thanks for pointing this out. Given this: > >>> > >>> +Optional properties: > >>> +- ti,palams-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 > mode. > >>> +- ti,palams-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 > mode. > >>> > >>> I think his work already encompasses what my patch is supposed to do. > >>> > >>> Abandoning this patch. > >> > >> OK, that's simple! > >> > >> Are the existing ti,mux-pad1/ti,mux-pad2 properties already in the > >> binding redundant with Laxman's pinctrl driver? > > > > In linux-next (where I based my work), yes, those two properties > > already exist, and as far as I understand it, are redundant with Laxman's > pinctrl driver. > > I expect those properties will go away with Laxman's pinctrl driver. > > Except those properties have been there for many kernel revisions and are > an ABI and hence can't be removed, although I noticed that they got > renamed recently, and of course we aren't technically being strict about this > quite yet... > > Re: the complete pinctrl driver: is anything outside the Palmas going to need > to reprogram the Palmas pinctrl HW at run-time? Are the functions that can > be routed to the pins just static configuration for PMIC features, or might > other generic (non-Palmas) drivers use those pins for something? If not, > perhaps it's be simpler to just add your ti,mux-pad3 property and be done. I can imagine other projects wanting to do runtime muxing on those pins. These pins can serve as GPIOs, or can be programmed for special functions. For my particular scenario, I just need to statically set that particular mux register (the power-on default value is not suitable for what we want to do, namely to use the GPIO_6 pin as an actual GPIO pin). If the existing ti,mux-pad1 and ti,mux-pad2 properties are to stay, in the spirit of not changing the existing ABI, then sure, we can make a case for adding the missing one (ti,mux-pad3) for completeness. In this case, if the palmas PMIC's pin configuration can be statically set at start of day, one won't even need to instantiate the palmas pinctrl driver at all, and with the addition of ti,mux-pad3, the pin configuration control will actually be complete. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/