Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756084Ab3HFQHW (ORCPT ); Tue, 6 Aug 2013 12:07:22 -0400 Received: from mail-ob0-f175.google.com ([209.85.214.175]:54909 "EHLO mail-ob0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755893Ab3HFQHU (ORCPT ); Tue, 6 Aug 2013 12:07:20 -0400 MIME-Version: 1.0 In-Reply-To: <5200F781.9020300@samsung.com> References: <003c01ce89f3$3abc4bc0$b034e340$@samsung.com> <27536111.odlCO093Zi@amdc1032> <003c01ce91cd$427fad70$c77f0850$@samsung.com> <1429191.3FDem6vW0S@amdc1032> <002001ce928a$f5a7f390$e0f7dab0$@samsung.com> <5200F781.9020300@samsung.com> Date: Tue, 6 Aug 2013 09:07:19 -0700 X-Google-Sender-Auth: Kmlli_7Hqgx7FON5EWfX1U3mUCU Message-ID: Subject: Re: [PATCH v8 06/12] ARM: dts: Add description of System MMU of Exynos SoCs From: Grant Grundler To: Marek Szyprowski Cc: Cho KyongHo , Bartlomiej Zolnierkiewicz , Linux ARM Kernel , Linux IOMMU , Linux Kernel , Linux Samsung SOC , Hyunwoong Kim , Joerg Roedel , Kukjin Kim , Prathyush , Rahul Sharma , Subash Patel , Keyyoung Park , Grant Grundler , Antonios Motakis , kvmarm@lists.cs.columbia.edu, Sachin Kamat Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1703 Lines: 41 Hi Marek, On Tue, Aug 6, 2013 at 6:17 AM, Marek Szyprowski wrote: ... > IMHO it is much better to have a simple driver, which binds to a single > IOMMU controller and leave it to the driver whether to have a same virtual address > space for all parts of FIMC-IS or MFC submodules/memory ports or not. I understand this part. I having written the IOMMU support for 4 different IOMMUs, all of which had exactly one IO Page Table and one IOMMU shared by many devices. > Just make sure that it will be possible to attach more than one sysmmu > controller to one iommu domain. I don't understand how this is possible. Can someone explain this better in the IOMMU documentation please? "iommu domain" to me means one virtual IO address space for attached devices that can master DMA transactions. The IOMMU then uses it's IO Page Table to translate the DMA address to the system physical address space and forwards the transaction. What is the role of the sysmmu in all of this? Is the sysmmu just the MMU (or collection of MMU) for host DRAM? Or is sysmmu responsible for "other stuff"? (clocks, power domains, MMU, etc) I can understand we might have multiple MMUs in a system...e.g. every range of memory might have it's own MMU. But they share the same physical address space and generally live under one page table. Because of "one page table" I would consider them one entity from the the IOMMUs perspective. thanks, grant -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/