Message-ID: <520B8F37.4040609@dawncrow.de>
Date: Wed, 14 Aug 2013 16:07:51 +0200
From: =?UTF-8?B?QW5kcsOpIEhlbnRzY2hlbA==?= <nerv@dawncrow.de>
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To: Jonathan Austin <jonathan.austin@arm.com>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Will Deacon <Will.Deacon@arm.com>
Subject: Re: arm: Only load TLS values when needed
References: <51E42E11.1010903@dawncrow.de> <51E5836B.1010904@arm.com> <51E59E8F.1060501@dawncrow.de> <51E67B98.9040101@arm.com> <51E6F532.1030004@dawncrow.de>
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Hi Jonathan,
Any updates on this?

Am 17.07.2013 21:49, schrieb André Hentschel:
> Am 17.07.2013 13:10, schrieb Jonathan Austin:
>> Hi André,

>> Do you have access to anything v6-NOT-k-ish? If not I can try and test this on something appropriate. How does your test-case access tpidrurw? If it uses inline asm then it won't work on v6-not-k, as those instructions aren't defined...
> 
> I don't, so it'd be nice if you could do that. I could imagine you have a good choice of devices at ARM :)
> 
> In my crappy test application i do it similar to Wine:
> https://github.com/AndreRH/tpidrurw-test/blob/master/main.c#L29
> 
> but Wine code won't work out of the box on v6:
> http://source.winehq.org/git/wine.git/blob/HEAD:/dlls/ntdll/signal_arm.c#l851
> 

>>> I'm not sure how this could make things worse on v6k, could you
>>> elaborate please? Besides of the ldr and str being too close to each
>>> other
>>
>> Yea, that's the only issue, and in the !CONFIG_CPU_USE_DOMAINS case things are slightly worse than they were before
>>
>>> i thought this patch is a good idea, because it removes two ldr
>>> which are always executed. (Continuing below...)
>>
>> Indeed, as long as it doesn't cause pipeline stalls then that's a gain for some cases :)
>>
>> [...]
>>>> Now we've only got one instruction between the store and the load
>>>> and risk stalling the pipeline...
>>>>
>>>> Dave M cautiously says "The ancient advice was that one instruction
>>>> was enough" but this is very core dependent... I wonder if anyone
>>>> has a good idea about whether this is an issue here...?
>>>
>>> We could use a ldrd at the top, that'd be nearly what we have right
>>> now, don't we?
>>
>> Yea, that'd be good - as far as I can see from an 1136 TRM, the ldrd *may* be two cycles (depending on alignment of the words) but the ldr and ldrne will always be two cycles. Ahhh, the joys of modifying the fast path ;)

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