Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758214Ab3HOOcN (ORCPT ); Thu, 15 Aug 2013 10:32:13 -0400 Received: from ns.mm-sol.com ([212.124.72.66]:52499 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757696Ab3HOOcJ (ORCPT ); Thu, 15 Aug 2013 10:32:09 -0400 From: Georgi Djakov To: cjb@laptop.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Georgi Djakov , Venkat Gopalakrishnan , Asutosh Das , Sahitya Tummala Subject: [PATCH 2/5] mmc: sdhci: add quirk for slow interrupt clearance Date: Thu, 15 Aug 2013 17:32:17 +0300 Message-Id: <1376577140-2652-3-git-send-email-gdjakov@mm-sol.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1376577140-2652-1-git-send-email-gdjakov@mm-sol.com> References: <1376577140-2652-1-git-send-email-gdjakov@mm-sol.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2232 Lines: 62 Initial version of Qualcomm SDHC has a hardware issue. This patch adds a quirk SDHCI_QUIRK2_SLOW_INT_CLR to enable a workaround. Hardware issue: Slow interrupt clearance at 400KHz may cause host driver interrupt handler to be called twice. Software workaround: Add 40us delay in interrupt handler when operating at initialization frequency(400KHz). CC: Venkat Gopalakrishnan CC: Asutosh Das CC: Sahitya Tummala Signed-off-by: Georgi Djakov --- drivers/mmc/host/sdhci.c | 6 ++++++ include/linux/mmc/sdhci.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 57659fb..d3c9e59 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -2460,12 +2460,18 @@ again: if (intmask & SDHCI_INT_CMD_MASK) { sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); + if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && + (host->clock <= 400000)) + udelay(40); sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); } if (intmask & SDHCI_INT_DATA_MASK) { sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, SDHCI_INT_STATUS); + if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && + (host->clock <= 400000)) + udelay(40); sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); } diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index 3783f4c..afd7cdf 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h @@ -100,6 +100,8 @@ struct sdhci_host { #define SDHCI_QUIRK2_BROKEN_HOST_CONTROL (1<<5) /* Controller cannot de-assert Read/Write Transfer Active after transaction */ #define SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT (1<<6) +/* Controller clears interrupt slowly and IRQ handler may be called twice */ +#define SDHCI_QUIRK2_SLOW_INT_CLR (1<<7) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/