Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753458Ab3HVLed (ORCPT ); Thu, 22 Aug 2013 07:34:33 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:50515 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753312Ab3HVLe3 (ORCPT ); Thu, 22 Aug 2013 07:34:29 -0400 Message-ID: <5215F6F6.9060703@ti.com> Date: Thu, 22 Aug 2013 17:03:10 +0530 From: Sricharan R User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120410 Thunderbird/11.0.1 MIME-Version: 1.0 To: Linus Walleij CC: Santosh Shilimkar , Tony Lindgren , Nishanth Menon , "linux-kernel@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" , "linux-doc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Linux-OMAP , Russell King - ARM Linux , Rajendra Nayak , Felipe Balbi , Thomas Gleixner , Grant Likely Subject: Re: [PATCH 1/3] misc: Add crossbar driver References: <51E83A4F.5080904@ti.com> <51ED2385.60108@ti.com> <51ED5C66.1010407@ti.com> <51EFFBE1.4090505@ti.com> <51F0031B.1050307@ti.com> <51F00530.9090703@ti.com> <51F02069.3050207@ti.com> <51F0223E.4050008@ti.com> <51F0240F.3050507@ti.com> <20130813081003.GU7656@atomide.com> <520A02BA.4090805@ti.com> <520D398D.9040806@ti.com> <520D44C5.6080205@ti.com> In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2852 Lines: 79 Hi Linus, On Thursday 22 August 2013 02:40 AM, Linus Walleij wrote: > On Thu, Aug 15, 2013 at 11:14 PM, Santosh Shilimkar > wrote: >> On Thursday 15 August 2013 04:51 PM, Linus Walleij wrote: > (...) >>> Sorry I don't understand what thread that is... can you point me there? >>> My previous statement on this issue what this: >>> http://marc.info/?l=linux-kernel&m=137442541628641&w=2 > (...) >>>> I don't see how you can make this happen with an irqchip >>>> infrastructure. >>> I think my post above describes this. >>> >> Sorry for being dumb but I don't think cascaded irqchip examples >> like GPIO and cross-bars are same. If you take an example of >> GPIO irqchip, it always have a physical connection even if it >> is 1 IRQ line for (32 logical/sparse IRQs). That goes with >> other MFD examples too. >> >> So may be I am still missing something in your proposal. > Why does it matter if it is a GPIO or MFD or whatever? > The point is that the IRQ line passes thru something else, > and this we model as an irqdomain. > > Anyway here is a silicon cascaded IRQ chip: > arch/arm/mach-versatile/core.c > See versatile_init_irq(): > > __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np); > (...) > fpga_irq_init(VA_SIC_BASE, "SIC", IRQ_SIC_START, > IRQ_VICSOURCE31, PIC_VALID, np); > > The VIC in the versatile has the SIC cascaded from one of > its IRQ lines. Both the VIC and SIC (fpga IRQ) are > using irqdomains so the SIC spawns a child irqdomain > from IRQ 31 (last IRQ) of the VIC. Ok, this is a typical example of irqchip cascaded. > The difference with a crossbar is that it can software-config > which IRQ goes where, and does not have a callback > to clear interrupts or anything like that, it just passes them > thru. But it is best modeled as an irqdomain IMO. We can model crossbar as irqchip and gic as its interrupt parent and peripherals to have crossbar as interrupt-parent. peripherals will do request_irq(crossbar_number) | | crossbar_unmask() | | maps crossbar number<-> to interrupt number and calls request_irq(int_no, crossbar_handler,..) crossbar_handler(interrupt number) | | get crossbar number from interrupt number | | handle_irq(crossbar_domain(crossbar number)) So this means a extra dummy handler. Also the concern is by modelling it as irqchip, we will have to find a different solution for DMA crossbar. Regards, Sricharan -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/