Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754207Ab3H1QCF (ORCPT ); Wed, 28 Aug 2013 12:02:05 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:34735 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753809Ab3H1QCC (ORCPT ); Wed, 28 Aug 2013 12:02:02 -0400 Date: Wed, 28 Aug 2013 17:01:51 +0100 From: Mark Rutland To: Felipe Balbi Cc: Kumar Gala , "rob.herring@calxeda.com" , Pawel Moll , Stephen Warren , Ian Campbell , "devicetree@vger.kernel.org" , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] usb: dwc3: core: clarify usb-phy array binding Message-ID: <20130828160151.GA17229@e106331-lin.cambridge.arm.com> References: <1376062832-23288-1-git-send-email-galak@codeaurora.org> <20130809162848.GW27325@e106331-lin.cambridge.arm.com> <1A03353A-9299-4D73-9786-4ECBC1DD4E05@codeaurora.org> <20130812180553.GD27954@radagast> <20130813133410.GO27165@e106331-lin.cambridge.arm.com> <20130827185329.GT3005@radagast> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130827185329.GT3005@radagast> Thread-Topic: [PATCH] usb: dwc3: core: clarify usb-phy array binding Accept-Language: en-GB, en-US Content-Language: en-US User-Agent: Mutt/1.5.20 (2009-06-14) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4184 Lines: 89 On Tue, Aug 27, 2013 at 07:53:29PM +0100, Felipe Balbi wrote: > Hi, > > On Tue, Aug 13, 2013 at 02:34:10PM +0100, Mark Rutland wrote: > > On Mon, Aug 12, 2013 at 07:05:53PM +0100, Felipe Balbi wrote: > > > On Fri, Aug 09, 2013 at 01:42:15PM -0500, Kumar Gala wrote: > > > > > > > > On Aug 9, 2013, at 11:28 AM, Mark Rutland wrote: > > > > > > > > > On Fri, Aug 09, 2013 at 04:40:32PM +0100, Kumar Gala wrote: > > > > >> The binding spec wasn't clear that the order of the phandles in the > > > > >> usb-phy array has meaning. Clarify this point in the binding that > > > > >> it should be . > > > > >> > > > > >> Signed-off-by: Kumar Gala > > > > >> --- > > > > >> Documentation/devicetree/bindings/usb/dwc3.txt | 4 +++- > > > > >> 1 file changed, 3 insertions(+), 1 deletion(-) > > > > >> > > > > >> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt > > > > >> index 7a95c65..8a9770b 100644 > > > > >> --- a/Documentation/devicetree/bindings/usb/dwc3.txt > > > > >> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt > > > > >> @@ -6,7 +6,9 @@ Required properties: > > > > >> - compatible: must be "synopsys,dwc3" > > > > >> - reg : Address and length of the register set for the device > > > > >> - interrupts: Interrupts used by the dwc3 controller. > > > > >> - - usb-phy : array of phandle for the PHY device > > > > >> + - usb-phy : array of phandle for the PHY device. The first element > > > > >> + in the array is expected to be a handle to the USB2/HS PHY and > > > > >> + the second element is expected to be a handle to the USB3/SS PHY > > > > > > > > > > Just to check - it's not valid to have a USB3 phy without a USB2 phy? > > > > > > > > Don't know, hopefully Felipe will chime in on that. > > > > > > that'd be a really non-standard implementation. Per-spec, USB3 is > > > *always* backwards compatible with USB2. > > > > I'm slightly confused here. From a quick look at the driver, it expects > > two separate phys to be present -- one handling only USB2, and one > > handling USB3 (with USB2 backwards compatibility). > > > > So it's not physically possible for someone to just wire up a single phy > > to the device, either USB2-only or USB3? > > of course it is :-) In fact, TI has done it. But it causes a whole bunch > of other problems to support that sort of model. For one, in some > systems, a clock generated by the USB3 PHY is backfed into the IP and if > USB3 PHY isn't running, the dwc3 IP won't start. That sounds like a mess. But unless I've misunderstood, that doesn't sound like a general problem with having one phy, but rather an integration issue on a specific system? Presumably in that case as long as the phy was brought up before poking the rest of the IP, the unit would function correctly. > > I even wrote a patch making USB3 PHY optional, but didn't push it > exactly because it broke some other systems and I can't guarantee users > won't mess up their DTS/pdata. Does that mean that their dts or pdata are wrong at the moment, but they're spared because the driver bails out due to a missing phy? If their pdata's wrong, that should be fixable relatively easily, but if the dt is wrong then I'm not sure how we can support those systems sensibly. That sounds like an ideal candidate for a dt quirks mechanism... > > > You can describe the USB2-only case in the dt by only listing the first > > phy (though the driver won't support it as it expects both to be > > present), but it's impossible to describe that you've wired up a single > > phy that's USB3 capable. > > you might be right there... Would it be possible to have something like (an optional) usb-phy-names? If not present, we assume the current situation, if present then we use it to figure out which phys are present. Maybe I'm missing something that makes that impossible? Thanks, Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/