Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755444Ab3H3Jvv (ORCPT ); Fri, 30 Aug 2013 05:51:51 -0400 Received: from co1ehsobe005.messaging.microsoft.com ([216.32.180.188]:52074 "EHLO co1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753521Ab3H3Jvr (ORCPT ); Fri, 30 Aug 2013 05:51:47 -0400 X-Forefront-Antispam-Report: CIP:70.37.183.190;KIP:(null);UIP:(null);IPV:NLI;H:mail.freescale.net;RD:none;EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) From: Xiubo Li To: , CC: , , , , , , , , , , , , Subject: [PATCHv2 4/4] Documentation: Add device tree bindings for Freescale FTM PWM. Date: Fri, 30 Aug 2013 17:48:52 +0800 Message-ID: <1377856132-11290-5-git-send-email-Li.Xiubo@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1377856132-11290-1-git-send-email-Li.Xiubo@freescale.com> References: <1377856132-11290-1-git-send-email-Li.Xiubo@freescale.com> MIME-Version: 1.0 Content-Type: text/plain X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2335 Lines: 64 This patch adds the document for Freescale FTM PWM driver under Documentation/devicetree/bindings/pwm/. Signed-off-by: Xiubo Li --- .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt new file mode 100644 index 0000000..b2b5214 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt @@ -0,0 +1,40 @@ +Freescale FTM PWM controller + +Required properties: +- compatible: Should be "fsl,vf610-ftm-pwm" +- reg: Physical base address and length of the controller's registers +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. +- clock-names : Includes the following module clock source entries: + "ftm0" (system clock), + "ftm0_fix_sel" (fixed frequency clock), + "ftm0_ext_sel" (external clock) +- clocks : Must contain an entry list for entries in clock-names. +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be one of the + entries in clock-names. +- fsl,pwm-avaliable-chs: The FTM channels ID list of current board which are + available as PWM function. +- For each channel's pinctrl, the "chN-active" and "chN-idle" states should be + implemented at same time. + +Example: + +pwm0: pwm@40038000 { + compatible = "fsl,vf610-ftm-pwm"; + reg = <0x40038000 0x1000>; + #pwm-cells = <3>; + clock-names = "ftm0", "ftm0_fix_sel", "ftm0_ext_sel"; + clocks = <&clks VF610_CLK_FTM0>, + <&clks VF610_CLK_FTM0_FIX_SEL>, + <&clks VF610_CLK_FTM0_EXT_SEL>; + pinctrl-names = "ch0-active", "ch0-idle", "ch1-active", "ch1-idle", + ....; + pinctrl-0 = <&pinctrl_pwm0_ch0_active>; + pinctrl-1 = <&pinctrl_pwm0_ch0_idle>; + pinctrl-2 = <&pinctrl_pwm0_ch1_active>; + pinctrl-3 = <&pinctrl_pwm0_ch1_idle>; + ... + fsl,pwm-counter-clk = "ftm0_ext_sel"; + fsl,pwm-avaliable-chs = <0 3 5 6>; + ... +}; -- 1.8.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/