Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753876Ab3I3AfL (ORCPT ); Sun, 29 Sep 2013 20:35:11 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:17827 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753029Ab3I3AfH (ORCPT ); Sun, 29 Sep 2013 20:35:07 -0400 X-AuditID: cbfee68f-b7f1e6d000004e8d-3f-5248c733ddf2 Date: Mon, 30 Sep 2013 09:35:00 +0900 From: Cho KyongHo To: Sean Paul Cc: Linux ARM Kernel , Linux IOMMU , Linux Kernel , Linux Samsung SOC , Hyunwoong Kim , Joerg Roedel , Kukjin Kim , Prathyush , Rahul Sharma , Subash Patel , Olof Johansson Subject: Re: [PATCH v6 07/12] ARM: EXYNOS: remove system mmu initialization from exynos tree Message-id: <20130930093500.ffa527f8f5f004e02a9cb187@samsung.com> In-reply-to: References: <003a01cde30b$e13c1910$a3b44b30$%cho@samsung.com> X-Mailer: Sylpheed 3.3.0 (GTK+ 2.10.14; i686-pc-mingw32) MIME-version: 1.0 Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrIIsWRmVeSWpSXmKPExsVy+t8zQ13j4x5BBs+Xslks2G9t0Tl7A7tF 74KrbBaN9yawWWx6fI3V4vKuOWwWM87vY7L4umU3o8WFFRvZLaYsOsxqcXfDWUaLluu9TA48 Hk8OzmPymN1wkcXjzrU9bB6bl9R7TL6xnNGjb8sqRo/Pm+QC2KO4bFJSczLLUov07RK4MiZe +89c0LuLqWLd4haWBsalJxm7GDk5JARMJB49W8MMYYtJXLi3nq2LkYtDSGAZo8TE25tZYIra lh1ihEhMZ5Q4v/odlDOJSeLGgatsIFUsAqoSZ6+3soLYbAJaEqvnHgcq4uAQAYrPu5IPUs8s 8JJZYnPHJiaQuLBAnMT5HaYg5bwCjhInV80BW8YpECyxcPsSJhBbSKCFUWLzbjmIIywkLjR1 sEPUC0r8mHwPrJ4ZaNXmbU2sELa8xOY1b5lBdkkItHJIPHw9mR3iNgGJb5MPsYDslRCQldh0 AOpjSYmDK26wTGAUm4Vk7CwkY2chGbuAkXkVo2hqQXJBcVJ6kbFecWJucWleul5yfu4mRkj0 9u9gvHvA+hBjMtDKicxSosn5wOjPK4k3NDYzsjA1MTU2Mrc0I01YSZxXrcU6UEggPbEkNTs1 tSC1KL6oNCe1+BAjEwenVAOj7fuJYZu5FhdfT20UWesUvoVtK98nnepHB/mnS5naumhfVUuy bKlzlstt43NyP7/l0NJ406WPTqWeU7jPeo23f/7snepPfI1nPtmal2XnK3Dm0Iene9qK1J54 NO94GBgXfnXJWdesWX79ByKZHXjr9S9wqB73e37Ga5pWeRhjQFvb9MWsEX1KLMUZiYZazEXF iQBPH2H59AIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHKsWRmVeSWpSXmKPExsVy+t9jQV2j4x5BBi2/LS0W7Le26Jy9gd2i d8FVNovGexPYLDY9vsZqcXnXHDaLGef3MVl83bKb0eLCio3sFlMWHWa1uLvhLKNFy/VeJgce jycH5zF5zG64yOJx59oeNo/NS+o9Jt9YzujRt2UVo8fnTXIB7FENjDYZqYkpqUUKqXnJ+SmZ eem2St7B8c7xpmYGhrqGlhbmSgp5ibmptkouPgG6bpk5QIcqKZQl5pQChQISi4uV9O0wTQgN cdO1gGmM0PUNCYLrMTJAAwnrGDMmXvvPXNC7i6li3eIWlgbGpScZuxg5OSQETCTalh2CssUk Ltxbz9bFyMUhJDCdUeL86neMEM4kJokbB66ygVSxCKhKnL3eygpiswloSayeexyoiINDBCg+ 70o+SD2zwEtmic0dm5hA4sICcRLnd5iClPMKOEqcXDWHBcTmFAiWWLh9CROILSTQwiixebcc xBEWEheaOtgh6gUlfky+B1bPDLRq87YmVghbXmLzmrfMExgFZiEpm4WkbBaSsgWMzKsYRVML kguKk9JzDfWKE3OLS/PS9ZLzczcxglPDM6kdjCsbLA4xCnAwKvHwTljuESTEmlhWXJl7iFGC g1lJhHd5ElCINyWxsiq1KD++qDQntfgQYzIwMCYyS4km5wPTVl5JvKGxiZmRpZGZhZGJuTlp wkrivAdarQOFBNITS1KzU1MLUotgtjBxcEo1MBoe612RypsmZTE3baX6op8nCzQ/hHM/1wt/ WegY5DFHZytf3JvQHe5b3nVOeBeTEzjpzVMNo06dzF7jo9sZLI6LPT46m+ly2q17qrO95nKd Wf2pRye6PC7nQ6uiHNsc/qcuFftPrvf8xLN12byLv9Kaa3VSvrxmWtdi83p7g0zDrNuHIzuv vVZiKc5INNRiLipOBADkMmhPUQMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 39631 Lines: 824 On Fri, 27 Sep 2013 14:55:51 -0400, Sean Paul wrote: > On Tue, Dec 25, 2012 at 8:54 PM, Cho KyongHo wrote: > > This removes System MMU initialization from arch/arm/mach-exynos/ > > to move them to DT and the exynos-iommu driver except gating clock > > definitions. > > > > > exynos with iommu support no longer compiles with this patch: > > CC drivers/iommu/exynos-iommu.o > /mnt/host/source/src/third_party/kernel-next/drivers/iommu/exynos-iommu.c:32:25: > fatal error: mach/sysmmu.h: No such file or directory > compilation terminated. > make[3]: *** [drivers/iommu/exynos-iommu.o] Error 1 > It is my fault. I think you need to apply all v6 patches to compile correctly. Since v8 patches, I checked that every patch is compiled successfully. iommu/exynos: do not include removed header patch from v7 patch removes including 'mach/sysmmu.h'. Thank you. > Sean > > > > Signed-off-by: KyongHo Cho > > --- > > arch/arm/mach-exynos/Kconfig | 5 - > > arch/arm/mach-exynos/Makefile | 1 - > > arch/arm/mach-exynos/clock-exynos4.c | 41 +++-- > > arch/arm/mach-exynos/clock-exynos4210.c | 9 +- > > arch/arm/mach-exynos/clock-exynos4212.c | 23 ++- > > arch/arm/mach-exynos/clock-exynos5.c | 62 ++++--- > > arch/arm/mach-exynos/dev-sysmmu.c | 274 ----------------------------- > > arch/arm/mach-exynos/include/mach/sysmmu.h | 66 ------- > > arch/arm/mach-exynos/mach-exynos4-dt.c | 34 ++++ > > arch/arm/mach-exynos/mach-exynos5-dt.c | 30 ++++ > > 10 files changed, 137 insertions(+), 408 deletions(-) > > delete mode 100644 arch/arm/mach-exynos/dev-sysmmu.c > > delete mode 100644 arch/arm/mach-exynos/include/mach/sysmmu.h > > > > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig > > index 91d5b6f..eba6eb5 100644 > > --- a/arch/arm/mach-exynos/Kconfig > > +++ b/arch/arm/mach-exynos/Kconfig > > @@ -103,11 +103,6 @@ config EXYNOS4_SETUP_FIMD0 > > help > > Common setup code for FIMD0. > > > > -config EXYNOS_DEV_SYSMMU > > - bool > > - help > > - Common setup code for SYSTEM MMU in EXYNOS platforms > > - > > config EXYNOS4_DEV_USB_OHCI > > bool > > help > > diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile > > index b189881..435757e 100644 > > --- a/arch/arm/mach-exynos/Makefile > > +++ b/arch/arm/mach-exynos/Makefile > > @@ -52,7 +52,6 @@ obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o > > obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o > > obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o > > obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o > > -obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o > > > > obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o > > obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o > > diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c > > index bbcb3de..8a8468d 100644 > > --- a/arch/arm/mach-exynos/clock-exynos4.c > > +++ b/arch/arm/mach-exynos/clock-exynos4.c > > @@ -24,7 +24,6 @@ > > > > #include > > #include > > -#include > > > > #include "common.h" > > #include "clock-exynos4.h" > > @@ -709,53 +708,53 @@ static struct clk exynos4_init_clocks_off[] = { > > .enable = exynos4_clk_ip_peril_ctrl, > > .ctrlbit = (1 << 14), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(mfc_l, 0), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.0", > > .enable = exynos4_clk_ip_mfc_ctrl, > > .ctrlbit = (1 << 1), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(mfc_r, 1), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.1", > > .enable = exynos4_clk_ip_mfc_ctrl, > > .ctrlbit = (1 << 2), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(tv, 2), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.2", > > .enable = exynos4_clk_ip_tv_ctrl, > > .ctrlbit = (1 << 4), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(jpeg, 3), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.3", > > .enable = exynos4_clk_ip_cam_ctrl, > > .ctrlbit = (1 << 11), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(rot, 4), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.4", > > .enable = exynos4_clk_ip_image_ctrl, > > .ctrlbit = (1 << 4), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimc0, 5), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.5", > > .enable = exynos4_clk_ip_cam_ctrl, > > .ctrlbit = (1 << 7), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimc1, 6), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.6", > > .enable = exynos4_clk_ip_cam_ctrl, > > .ctrlbit = (1 << 8), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimc2, 7), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.7", > > .enable = exynos4_clk_ip_cam_ctrl, > > .ctrlbit = (1 << 9), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimc3, 8), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.8", > > .enable = exynos4_clk_ip_cam_ctrl, > > .ctrlbit = (1 << 10), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimd0, 10), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.10", > > .enable = exynos4_clk_ip_lcd0_ctrl, > > .ctrlbit = (1 << 4), > > } > > diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c > > index fed4c26..19af9f7 100644 > > --- a/arch/arm/mach-exynos/clock-exynos4210.c > > +++ b/arch/arm/mach-exynos/clock-exynos4210.c > > @@ -26,7 +26,6 @@ > > #include > > #include > > #include > > -#include > > > > #include "common.h" > > #include "clock-exynos4.h" > > @@ -129,13 +128,13 @@ static struct clk init_clocks_off[] = { > > .enable = exynos4_clk_ip_lcd1_ctrl, > > .ctrlbit = (1 << 0), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.9", > > .enable = exynos4_clk_ip_image_ctrl, > > .ctrlbit = (1 << 3), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(fimd1, 11), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.11", > > .enable = exynos4_clk_ip_lcd1_ctrl, > > .ctrlbit = (1 << 4), > > }, { > > diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c > > index 8fba0b5..529476f 100644 > > --- a/arch/arm/mach-exynos/clock-exynos4212.c > > +++ b/arch/arm/mach-exynos/clock-exynos4212.c > > @@ -26,7 +26,6 @@ > > #include > > #include > > #include > > -#include > > > > #include "common.h" > > #include "clock-exynos4.h" > > @@ -111,21 +110,31 @@ static struct clksrc_clk clksrcs[] = { > > > > static struct clk init_clocks_off[] = { > > { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.9", > > .enable = exynos4_clk_ip_dmc_ctrl, > > .ctrlbit = (1 << 24), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.12", > > .enable = exynos4212_clk_ip_isp0_ctrl, > > .ctrlbit = (7 << 8), > > }, { > > - .name = SYSMMU_CLOCK_NAME2, > > - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.13", > > .enable = exynos4212_clk_ip_isp1_ctrl, > > .ctrlbit = (1 << 4), > > }, { > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.14", > > + .enable = exynos4212_clk_ip_isp0_ctrl, > > + .ctrlbit = (1 << 11), > > + }, { > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.15", > > + .enable = exynos4212_clk_ip_isp0_ctrl, > > + .ctrlbit = (1 << 12), > > + }, { > > .name = "flite", > > .devname = "exynos-fimc-lite.0", > > .enable = exynos4212_clk_ip_isp0_ctrl, > > diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c > > index 0208c3a..bee2d53 100644 > > --- a/arch/arm/mach-exynos/clock-exynos5.c > > +++ b/arch/arm/mach-exynos/clock-exynos5.c > > @@ -24,7 +24,6 @@ > > > > #include > > #include > > -#include > > > > #include "common.h" > > > > @@ -869,86 +868,91 @@ static struct clk exynos5_init_clocks_off[] = { > > .enable = exynos5_clk_ip_gscl_ctrl, > > .ctrlbit = (1 << 3), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(mfc_l, 0), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.1", > > .enable = &exynos5_clk_ip_mfc_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 1), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(mfc_r, 1), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.0", > > .enable = &exynos5_clk_ip_mfc_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 2), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(tv, 2), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.2", > > .enable = &exynos5_clk_ip_disp1_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 9) > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(jpeg, 3), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.3", > > .enable = &exynos5_clk_ip_gen_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 7), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(rot, 4), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.4", > > .enable = &exynos5_clk_ip_gen_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 6) > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(gsc0, 5), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.5", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 7), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(gsc1, 6), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.6", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 8), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(gsc2, 7), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.7", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 9), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(gsc3, 8), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.8", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 10), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.9", > > .enable = &exynos5_clk_ip_isp0_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (0x3F << 8), > > }, { > > - .name = SYSMMU_CLOCK_NAME2, > > - .devname = SYSMMU_CLOCK_DEVNAME(isp, 9), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.10", > > .enable = &exynos5_clk_ip_isp1_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (0xF << 4), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(camif0, 12), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.11", > > + .enable = &exynos5_clk_ip_disp1_ctrl, > > + .ctrlbit = (1 << 8) > > + }, { > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.12", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 11), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(camif1, 13), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.13", > > .enable = &exynos5_clk_ip_gscl_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 12), > > }, { > > - .name = SYSMMU_CLOCK_NAME, > > - .devname = SYSMMU_CLOCK_DEVNAME(2d, 14), > > + .name = "sysmmu", > > + .devname = "exynos-sysmmu.14", > > .enable = &exynos5_clk_ip_acp_ctrl, > > .ops = &exynos5_gate_clk_ops, > > .ctrlbit = (1 << 7) > > diff --git a/arch/arm/mach-exynos/dev-sysmmu.c b/arch/arm/mach-exynos/dev-sysmmu.c > > deleted file mode 100644 > > index c5b1ea3..0000000 > > --- a/arch/arm/mach-exynos/dev-sysmmu.c > > +++ /dev/null > > @@ -1,274 +0,0 @@ > > -/* linux/arch/arm/mach-exynos/dev-sysmmu.c > > - * > > - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. > > - * http://www.samsung.com > > - * > > - * EXYNOS - System MMU support > > - * > > - * This program is free software; you can redistribute it and/or modify > > - * it under the terms of the GNU General Public License version 2 as > > - * published by the Free Software Foundation. > > - */ > > - > > -#include > > -#include > > - > > -#include > > - > > -#include > > -#include > > -#include > > - > > -static u64 exynos_sysmmu_dma_mask = DMA_BIT_MASK(32); > > - > > -#define SYSMMU_PLATFORM_DEVICE(ipname, devid) \ > > -static struct sysmmu_platform_data platdata_##ipname = { \ > > - .dbgname = #ipname, \ > > -}; \ > > -struct platform_device SYSMMU_PLATDEV(ipname) = \ > > -{ \ > > - .name = SYSMMU_DEVNAME_BASE, \ > > - .id = devid, \ > > - .dev = { \ > > - .dma_mask = &exynos_sysmmu_dma_mask, \ > > - .coherent_dma_mask = DMA_BIT_MASK(32), \ > > - .platform_data = &platdata_##ipname, \ > > - }, \ > > -} > > - > > -SYSMMU_PLATFORM_DEVICE(mfc_l, 0); > > -SYSMMU_PLATFORM_DEVICE(mfc_r, 1); > > -SYSMMU_PLATFORM_DEVICE(tv, 2); > > -SYSMMU_PLATFORM_DEVICE(jpeg, 3); > > -SYSMMU_PLATFORM_DEVICE(rot, 4); > > -SYSMMU_PLATFORM_DEVICE(fimc0, 5); /* fimc* and gsc* exist exclusively */ > > -SYSMMU_PLATFORM_DEVICE(fimc1, 6); > > -SYSMMU_PLATFORM_DEVICE(fimc2, 7); > > -SYSMMU_PLATFORM_DEVICE(fimc3, 8); > > -SYSMMU_PLATFORM_DEVICE(gsc0, 5); > > -SYSMMU_PLATFORM_DEVICE(gsc1, 6); > > -SYSMMU_PLATFORM_DEVICE(gsc2, 7); > > -SYSMMU_PLATFORM_DEVICE(gsc3, 8); > > -SYSMMU_PLATFORM_DEVICE(isp, 9); > > -SYSMMU_PLATFORM_DEVICE(fimd0, 10); > > -SYSMMU_PLATFORM_DEVICE(fimd1, 11); > > -SYSMMU_PLATFORM_DEVICE(camif0, 12); > > -SYSMMU_PLATFORM_DEVICE(camif1, 13); > > -SYSMMU_PLATFORM_DEVICE(2d, 14); > > - > > -#define SYSMMU_RESOURCE_NAME(core, ipname) sysmmures_##core##_##ipname > > - > > -#define SYSMMU_RESOURCE(core, ipname) \ > > - static struct resource SYSMMU_RESOURCE_NAME(core, ipname)[] __initdata = > > - > > -#define DEFINE_SYSMMU_RESOURCE(core, mem, irq) \ > > - DEFINE_RES_MEM_NAMED(core##_PA_SYSMMU_##mem, SZ_4K, #mem), \ > > - DEFINE_RES_IRQ_NAMED(core##_IRQ_SYSMMU_##irq##_0, #mem) > > - > > -#define SYSMMU_RESOURCE_DEFINE(core, ipname, mem, irq) \ > > - SYSMMU_RESOURCE(core, ipname) { \ > > - DEFINE_SYSMMU_RESOURCE(core, mem, irq) \ > > - } > > - > > -struct sysmmu_resource_map { > > - struct platform_device *pdev; > > - struct resource *res; > > - u32 rnum; > > - struct device *pdd; > > - char *clocknames; > > -}; > > - > > -#define SYSMMU_RESOURCE_MAPPING(core, ipname, resname) { \ > > - .pdev = &SYSMMU_PLATDEV(ipname), \ > > - .res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ > > - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ > > - .clocknames = SYSMMU_CLOCK_NAME, \ > > -} > > - > > -#define SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata) { \ > > - .pdev = &SYSMMU_PLATDEV(ipname), \ > > - .res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ > > - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ > > - .clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2, \ > > -} > > - > > -#ifdef CONFIG_EXYNOS_DEV_PD > > -#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd) { \ > > - .pdev = &SYSMMU_PLATDEV(ipname), \ > > - .res = &SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ > > - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ > > - .clocknames = SYSMMU_CLOCK_NAME, \ > > - .pdd = &exynos##core##_device_pd[pd].dev, \ > > -} > > - > > -#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata) {\ > > - .pdev = &SYSMMU_PLATDEV(ipname), \ > > - .res = &SYSMMU_RESOURCE_NAME(EXYNOS##core, resname), \ > > - .rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\ > > - .clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2, \ > > - .pdd = &exynos##core##_device_pd[pd].dev, \ > > -} > > -#else > > -#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd) \ > > - SYSMMU_RESOURCE_MAPPING(core, ipname, resname) > > -#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata) \ > > - SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata) > > - > > -#endif /* CONFIG_EXYNOS_DEV_PD */ > > - > > -#ifdef CONFIG_ARCH_EXYNOS4 > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc0, FIMC0, FIMC0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc1, FIMC1, FIMC1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc2, FIMC2, FIMC2); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc3, FIMC3, FIMC3); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, jpeg, JPEG, JPEG); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d, G2D, 2D); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, tv, TV, TV_M0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d_acp, 2D_ACP, 2D); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, rot, ROTATOR, ROTATOR); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd0, FIMD0, LCD0_M0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd1, FIMD1, LCD1_M1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite0, FIMC_LITE0, FIMC_LITE0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite1, FIMC_LITE1, FIMC_LITE1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_r, MFC_R, MFC_M0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_l, MFC_L, MFC_M1); > > -SYSMMU_RESOURCE(EXYNOS4, isp) { > > - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_ISP, FIMC_ISP), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_DRC, FIMC_DRC), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_FD, FIMC_FD), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS4, ISPCPU, FIMC_CX), > > -}; > > - > > -static struct sysmmu_resource_map sysmmu_resmap4[] __initdata = { > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimc0, fimc0, PD_CAM), > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimc1, fimc1, PD_CAM), > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimc2, fimc2, PD_CAM), > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimc3, fimc3, PD_CAM), > > - SYSMMU_RESOURCE_MAPPING_PD(4, tv, tv, PD_TV), > > - SYSMMU_RESOURCE_MAPPING_PD(4, mfc_r, mfc_r, PD_MFC), > > - SYSMMU_RESOURCE_MAPPING_PD(4, mfc_l, mfc_l, PD_MFC), > > - SYSMMU_RESOURCE_MAPPING_PD(4, rot, rot, PD_LCD0), > > - SYSMMU_RESOURCE_MAPPING_PD(4, jpeg, jpeg, PD_CAM), > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimd0, fimd0, PD_LCD0), > > -}; > > - > > -static struct sysmmu_resource_map sysmmu_resmap4210[] __initdata = { > > - SYSMMU_RESOURCE_MAPPING_PD(4, 2d, 2d, PD_LCD0), > > - SYSMMU_RESOURCE_MAPPING_PD(4, fimd1, fimd1, PD_LCD1), > > -}; > > - > > -static struct sysmmu_resource_map sysmmu_resmap4212[] __initdata = { > > - SYSMMU_RESOURCE_MAPPING(4, 2d, 2d_acp), > > - SYSMMU_RESOURCE_MAPPING_PD(4, camif0, flite0, PD_ISP), > > - SYSMMU_RESOURCE_MAPPING_PD(4, camif1, flite1, PD_ISP), > > - SYSMMU_RESOURCE_MAPPING_PD(4, isp, isp, PD_ISP), > > -}; > > -#endif /* CONFIG_ARCH_EXYNOS4 */ > > - > > -#ifdef CONFIG_ARCH_EXYNOS5 > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, jpeg, JPEG, JPEG); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, fimd1, FIMD1, FIMD1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, 2d, 2D, 2D); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, rot, ROTATOR, ROTATOR); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, tv, TV, TV); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite0, LITE0, LITE0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite1, LITE1, LITE1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc0, GSC0, GSC0); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc1, GSC1, GSC1); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc2, GSC2, GSC2); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc3, GSC3, GSC3); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_r, MFC_R, MFC_R); > > -SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_l, MFC_L, MFC_L); > > -SYSMMU_RESOURCE(EXYNOS5, isp) { > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISP, ISP), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DRC, DRC), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, FD, FD), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISPCPU, MCUISP), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERC, SCALERCISP), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERP, SCALERPISP), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, ODC, ODC), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS0, DIS0), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS1, DIS1), > > - DEFINE_SYSMMU_RESOURCE(EXYNOS5, 3DNR, 3DNR), > > -}; > > - > > -static struct sysmmu_resource_map sysmmu_resmap5[] __initdata = { > > - SYSMMU_RESOURCE_MAPPING(5, jpeg, jpeg), > > - SYSMMU_RESOURCE_MAPPING(5, fimd1, fimd1), > > - SYSMMU_RESOURCE_MAPPING(5, 2d, 2d), > > - SYSMMU_RESOURCE_MAPPING(5, rot, rot), > > - SYSMMU_RESOURCE_MAPPING_PD(5, tv, tv, PD_DISP1), > > - SYSMMU_RESOURCE_MAPPING_PD(5, camif0, flite0, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, camif1, flite1, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, gsc0, gsc0, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, gsc1, gsc1, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, gsc2, gsc2, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, gsc3, gsc3, PD_GSCL), > > - SYSMMU_RESOURCE_MAPPING_PD(5, mfc_r, mfc_r, PD_MFC), > > - SYSMMU_RESOURCE_MAPPING_PD(5, mfc_l, mfc_l, PD_MFC), > > - SYSMMU_RESOURCE_MAPPING_MCPD(5, isp, isp, PD_ISP, mc_platdata), > > -}; > > -#endif /* CONFIG_ARCH_EXYNOS5 */ > > - > > -static int __init init_sysmmu_platform_device(void) > > -{ > > - int i, j; > > - struct sysmmu_resource_map *resmap[2] = {NULL, NULL}; > > - int nmap[2] = {0, 0}; > > - > > -#ifdef CONFIG_ARCH_EXYNOS5 > > - if (soc_is_exynos5250()) { > > - resmap[0] = sysmmu_resmap5; > > - nmap[0] = ARRAY_SIZE(sysmmu_resmap5); > > - nmap[1] = 0; > > - } > > -#endif > > - > > -#ifdef CONFIG_ARCH_EXYNOS4 > > - if (resmap[0] == NULL) { > > - resmap[0] = sysmmu_resmap4; > > - nmap[0] = ARRAY_SIZE(sysmmu_resmap4); > > - } > > - > > - if (soc_is_exynos4210()) { > > - resmap[1] = sysmmu_resmap4210; > > - nmap[1] = ARRAY_SIZE(sysmmu_resmap4210); > > - } > > - > > - if (soc_is_exynos4412() || soc_is_exynos4212()) { > > - resmap[1] = sysmmu_resmap4212; > > - nmap[1] = ARRAY_SIZE(sysmmu_resmap4212); > > - } > > -#endif > > - > > - for (j = 0; j < 2; j++) { > > - for (i = 0; i < nmap[j]; i++) { > > - struct sysmmu_resource_map *map; > > - struct sysmmu_platform_data *platdata; > > - > > - map = &resmap[j][i]; > > - > > - map->pdev->dev.parent = map->pdd; > > - > > - platdata = map->pdev->dev.platform_data; > > - platdata->clockname = map->clocknames; > > - > > - if (platform_device_add_resources(map->pdev, map->res, > > - map->rnum)) { > > - pr_err("%s: Failed to add device resources for " > > - "%s.%d\n", __func__, > > - map->pdev->name, map->pdev->id); > > - continue; > > - } > > - > > - if (platform_device_register(map->pdev)) { > > - pr_err("%s: Failed to register %s.%d\n", > > - __func__, map->pdev->name, > > - map->pdev->id); > > - } > > - } > > - } > > - > > - return 0; > > -} > > -arch_initcall(init_sysmmu_platform_device); > > diff --git a/arch/arm/mach-exynos/include/mach/sysmmu.h b/arch/arm/mach-exynos/include/mach/sysmmu.h > > deleted file mode 100644 > > index 88a4543..0000000 > > --- a/arch/arm/mach-exynos/include/mach/sysmmu.h > > +++ /dev/null > > @@ -1,66 +0,0 @@ > > -/* > > - * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. > > - * http://www.samsung.com > > - * > > - * EXYNOS - System MMU support > > - * > > - * This program is free software; you can redistribute it and/or modify > > - * it under the terms of the GNU General Public License version 2 as > > - * published by the Free Software Foundation. > > - */ > > - > > -#ifndef _ARM_MACH_EXYNOS_SYSMMU_H_ > > -#define _ARM_MACH_EXYNOS_SYSMMU_H_ > > - > > -struct sysmmu_platform_data { > > - char *dbgname; > > - /* comma(,) separated list of clock names for clock gating */ > > - char *clockname; > > -}; > > - > > -#define SYSMMU_DEVNAME_BASE "exynos-sysmmu" > > - > > -#define SYSMMU_CLOCK_NAME "sysmmu" > > -#define SYSMMU_CLOCK_NAME2 "sysmmu_mc" > > - > > -#ifdef CONFIG_EXYNOS_DEV_SYSMMU > > -#include > > -struct platform_device; > > - > > -#define SYSMMU_PLATDEV(ipname) exynos_device_sysmmu_##ipname > > - > > -extern struct platform_device SYSMMU_PLATDEV(mfc_l); > > -extern struct platform_device SYSMMU_PLATDEV(mfc_r); > > -extern struct platform_device SYSMMU_PLATDEV(tv); > > -extern struct platform_device SYSMMU_PLATDEV(jpeg); > > -extern struct platform_device SYSMMU_PLATDEV(rot); > > -extern struct platform_device SYSMMU_PLATDEV(fimc0); > > -extern struct platform_device SYSMMU_PLATDEV(fimc1); > > -extern struct platform_device SYSMMU_PLATDEV(fimc2); > > -extern struct platform_device SYSMMU_PLATDEV(fimc3); > > -extern struct platform_device SYSMMU_PLATDEV(gsc0); > > -extern struct platform_device SYSMMU_PLATDEV(gsc1); > > -extern struct platform_device SYSMMU_PLATDEV(gsc2); > > -extern struct platform_device SYSMMU_PLATDEV(gsc3); > > -extern struct platform_device SYSMMU_PLATDEV(isp); > > -extern struct platform_device SYSMMU_PLATDEV(fimd0); > > -extern struct platform_device SYSMMU_PLATDEV(fimd1); > > -extern struct platform_device SYSMMU_PLATDEV(camif0); > > -extern struct platform_device SYSMMU_PLATDEV(camif1); > > -extern struct platform_device SYSMMU_PLATDEV(2d); > > - > > -#ifdef CONFIG_IOMMU_API > > -static inline void platform_set_sysmmu( > > - struct device *sysmmu, struct device *dev) > > -{ > > - dev->archdata.iommu = sysmmu; > > -} > > -#endif > > - > > -#else /* !CONFIG_EXYNOS_DEV_SYSMMU */ > > -#define platform_set_sysmmu(sysmmu, dev) do { } while (0) > > -#endif > > - > > -#define SYSMMU_CLOCK_DEVNAME(ipname, id) (SYSMMU_DEVNAME_BASE "." #id) > > - > > -#endif /* _ARM_MACH_EXYNOS_SYSMMU_H_ */ > > diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c > > index 92757ff..ac09af8 100644 > > --- a/arch/arm/mach-exynos/mach-exynos4-dt.c > > +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c > > @@ -80,6 +80,40 @@ static const struct of_dev_auxdata exynos4_auxdata_lookup[] __initconst = { > > OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_MDMA1, "dma-pl330.2", NULL), > > OF_DEV_AUXDATA("samsung,exynos4210-tmu", EXYNOS4_PA_TMU, > > "exynos-tmu", NULL), > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13620000, > > + "exynos-sysmmu.0", NULL), /* MFC_L */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13630000, > > + "exynos-sysmmu.1", NULL), /* MFC_R */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E20000, > > + "exynos-sysmmu.2", NULL), /* TV */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A60000, > > + "exynos-sysmmu.3", NULL), /* JPEG */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12A30000, > > + "exynos-sysmmu.4", NULL), /* ROTATOR */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A20000, > > + "exynos-sysmmu.5", NULL), /* FIMC0 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A30000, > > + "exynos-sysmmu.6", NULL), /* FIMC1 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A40000, > > + "exynos-sysmmu.7", NULL), /* FIMC2 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11A50000, > > + "exynos-sysmmu.8", NULL), /* FIMC3 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12A20000, > > + "exynos-sysmmu.9", NULL), /* G2D(4210) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A40000, > > + "exynos-sysmmu.9", NULL), /* G2D(4x12) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11E20000, > > + "exynos-sysmmu.10", NULL), /* FIMD0 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12220000, > > + "exynos-sysmmu.11", NULL), /* FIMD1(4210) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x12260000, > > + "exynos-sysmmu.12", NULL), /* IS0(4x12) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x122B0000, > > + "exynos-sysmmu.13", NULL), /* IS1(4x12) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x123B0000, > > + "exynos-sysmmu.14", NULL), /* FIMC-LITE0(4x12) */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x123C0000, > > + "exynos-sysmmu.15", NULL), /* FIMC-LITE1(4x12) */ > > {}, > > }; > > > > diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c > > index e99d3d8..2671075 100644 > > --- a/arch/arm/mach-exynos/mach-exynos5-dt.c > > +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c > > @@ -104,6 +104,36 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { > > OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL), > > OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000, > > "exynos-tmu", NULL), > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11210000, > > + "exynos-sysmmu.0", "mfc"), /* MFC_L */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11200000, > > + "exynos-sysmmu.1", "mfc"), /* MFC_R */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14650000, > > + "exynos-sysmmu.2", NULL), /* TV */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11F20000, > > + "exynos-sysmmu.3", "jpeg"), /* JPEG */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11D40000, > > + "exynos-sysmmu.4", NULL), /* ROTATOR */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E80000, > > + "exynos-sysmmu.5", "gscl"), /* GSCL0 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E90000, > > + "exynos-sysmmu.6", "gscl"), /* GSCL1 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EA0000, > > + "exynos-sysmmu.7", "gscl"), /* GSCL2 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EB0000, > > + "exynos-sysmmu.8", "gscl"), /* GSCL3 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13260000, > > + "exynos-sysmmu.9", NULL), /* FIMC-IS0 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x132C0000, > > + "exynos-sysmmu.10", NULL), /* FIMC-IS1 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14640000, > > + "exynos-sysmmu.11", NULL), /* FIMD1 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C40000, > > + "exynos-sysmmu.12", NULL), /* FIMC-LITE0 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C50000, > > + "exynos-sysmmu.13", NULL), /* FIMC-LITE1 */ > > + OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A60000, > > + "exynos-sysmmu.14", NULL), /* G2D */ > > {}, > > }; > > > > -- > > 1.8.0 > > > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > > the body of a message to majordomo@vger.kernel.org > > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/