Date: Tue, 8 Oct 2013 15:56:54 +0200
From: Thierry Reding <thierry.reding@gmail.com>
To: swarren@wwwdotorg.org, ian.campbell@citrix.com, mark.rutland@arm.com,
        pawel.moll@arm.com, rob.herring@calxeda.com
Cc: r65073@freescale.com, s.hauer@pengutronix.de, t.figa@samsung.com,
        grant.likely@linaro.org, linux@arm.linux.org.uk, rob@landley.net,
        linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-doc@vger.kernel.org, Xiubo Li <Li.Xiubo@freescale.com>
Subject: Re: [PATCHv5 4/4] Documentation: Add device tree bindings for
 Freescale FTM PWM.
Message-ID: <20131008135654.GB16550@ulmo.nvidia.com>
References: <1380521611-2764-1-git-send-email-Li.Xiubo@freescale.com>
 <1380521611-2764-5-git-send-email-Li.Xiubo@freescale.com>
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On Mon, Sep 30, 2013 at 02:13:31PM +0800, Xiubo Li wrote:
> This adds the Document for Freescale FTM PWM driver under
> Documentation/devicetree/bindings/pwm/.
>=20
> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
> ---
>  .../devicetree/bindings/pwm/pwm-fsl-ftm.txt        | 33 ++++++++++++++++=
++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt

Can someone of the device tree bindings maintainers review and ACK this?
I think it'd be good to squash this patch with the driver patch (patch 1
of this series). I can do that when I apply this.

Thierry

>=20
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Docu=
mentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
> new file mode 100644
> index 0000000..2c6969a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
> @@ -0,0 +1,33 @@
> +Freescale FTM PWM controller
> +
> +Required properties:
> +- compatible: Should be "fsl,vf610-ftm-pwm"
> +- reg: Physical base address and length of the controller's registers
> +- #pwm-cells: Should be 3. See pwm.txt in this directory for a descripti=
on of
> +  the cells format.
> +- clock-names : Includes the following module clock source entries:
> +    "ftm0" (system clock),
> +    "ftm0_fix_sel" (fixed frequency clock),
> +    "ftm0_ext_sel" (external clock)
> +- clocks : Must contain a clock specifier for each entry in clock-names.
> +- fsl,pwm-counter-clk: The FTM PWM counter clock source, should be one o=
f the
> +  entries in clock-names.
> +- pinctrl-names: must contain a "default" entry.
> +- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
> +  See ../pinctrl/pinctrl-bindings.txt for details of the property values.
> +
> +
> +Example:
> +
> +pwm0: pwm@40038000 {
> +		compatible =3D "fsl,vf610-ftm-pwm";
> +		reg =3D <0x40038000 0x1000>;
> +		#pwm-cells =3D <3>;
> +		clock-names =3D "ftm0", "ftm0_fix_sel", "ftm0_ext_sel";
> +		clocks =3D <&clks VF610_CLK_FTM0>,
> +			<&clks VF610_CLK_FTM0_FIX_SEL>,
> +			<&clks VF610_CLK_FTM0_EXT_SEL>;
> +		pinctrl-names =3D "default";
> +		pinctrl-0 =3D <&pinctrl_pwm0_1>;
> +		fsl,pwm-counter-clk =3D "ftm0_ext_sel";
> +};
> --=20
> 1.8.0
>=20
>=20

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