Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756908Ab3JQOdG (ORCPT ); Thu, 17 Oct 2013 10:33:06 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.21]:50464 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756187Ab3JQOdD (ORCPT ); Thu, 17 Oct 2013 10:33:03 -0400 Date: Thu, 17 Oct 2013 15:32:04 +0100 From: Dave Martin To: Daniel Lezcano Cc: Vyacheslav Tyrtov , linux-kernel@vger.kernel.org, Mark Rutland , devicetree@vger.kernel.org, Kukjin Kim , Russell King , Ben Dooks , Pawel Moll , Ian Campbell , Nicolas Pitre , Stephen Warren , linux-doc@vger.kernel.org, Rob Herring , Tarek Dakhran , linux-samsung-soc@vger.kernel.org, Rob Landley , Mike Turquette , Thomas Gleixner , Naour Romain , Lorenzo Pieralisi , linux-arm-kernel@lists.infradead.org, Heiko Stuebner Subject: Re: [PATCH v2 3/4] ARM: EXYNOS: add Exynos Dual Cluster Support Message-ID: <20131017143204.GE2442@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1593 Lines: 55 On Thu, Oct 17, 2013 at 12:45:29PM +0200, Daniel Lezcano wrote: > On 10/14/2013 05:08 PM, Vyacheslav Tyrtov wrote: > > From: Tarek Dakhran > > > > Add EDCS(Exynos Dual Cluster Support) for Samsung Exynos5410 SoC. > > This enables all 8 cores, 4 x A7 and 4 x A15 run at the same time. [...] > > + __mcpm_cpu_down(cpu, cluster); > > + > > + if (!skip_wfi) { > > + exynos_core_power_down(cpu, cluster); > > + wfi(); > > + } > > +} > > I did not looked line by line but these functions looks very similar > than the tc2_pm.c's function. no ? This is true. > May be some code consolidation could be considered here. > > Added Nico and Lorenzo in Cc. > > Thanks > -- Daniel Nico can commnent further, but I think the main concern here was that this code shouldn't be factored prematurely. There are many low-level platform specifics involved here, so it's hard to be certain that all platforms could fit into a more abstracted framework until we have some evidence to look at. This could be revisited when we have a few diverse MCPM ports to compare. The low-level A15/A7 cacheflush sequence is already being factored by Nico [1]. Cheers ---Dave [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-October/205085.html [PATCH] ARM: cacheflush: consolidate single-CPU ARMv7 cache disabling code [...] -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/