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Date: Fri, 25 Oct 2002 18:45:13 -0500
From: "David D. Hagood" <wowbagger@sktc.net>
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To: Robert Love <rml@tech9.net>
CC: Jeff Garzik <jgarzik@pobox.com>, "Nakajima, Jun" <jun.nakajima@intel.com>,
       Daniel Phillips <phillips@arcor.de>,
       Alan Cox <alan@lxorguk.ukuu.org.uk>,
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       "'Martin J. Bligh'" <mbligh@aracnet.com>
Subject: Re: [PATCH] hyper-threading information in /proc/cpuinfo
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Robert Love wrote:

>
> If there are subcores, then I think there must be some major core. 

I would assert that, at least in the case of the P4, there IS a "major 
core", as the 2 subcores share L1 and bus controller access, as well as 
several other parts of the chip.

I beleive this is to some extent the case in the Power4 modules - that 
each module contains resources shared by the execution units. However, I 
might be full of it, and since there are plenty of @ibm.com's here I 
expect to be corrected shortly....



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