Date: Thu, 23 Jan 2014 20:11:40 +0100
From: Peter Zijlstra <peterz@infradead.org>
To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Andi Kleen <andi@firstfloor.org>, Huang Ying <ying.huang@intel.com>,
        Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
        "H. Peter Anvin" <hpa@zytor.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: x86: Inconsistent xAPIC synchronization in arch_irq_work_raise?
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On Thu, Jan 23, 2014 at 07:51:40PM +0100, Jan Kiszka wrote:
> Next we have x86's arch_irq_work_raise which does wait-write-wait,
> either by chance or in order to work around a missing atomicity of
> wait+write somewhere else. Preemption is off, interrupts remain on.

Note that arch_irq_work_raise() is 'special' in that its used from NMI
context, so no amount of interrupts disabling will serialize things.
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