Message-ID: <52E726BE.50401@intel.com>
Date: Tue, 28 Jan 2014 11:40:46 +0800
From: Ren Qiaowei <qiaowei.ren@intel.com>
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To: Andy Lutomirski <luto@amacapital.net>, "H. Peter Anvin" <hpa@zytor.com>,
        Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>
CC: X86 ML <x86@kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/4] x86, mpx: add documentation on Intel MPX
References: <1390727338-20487-1-git-send-email-qiaowei.ren@intel.com> <1390727338-20487-2-git-send-email-qiaowei.ren@intel.com> <52E6C134.3050608@mit.edu>
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On 01/28/2014 04:27 AM, Andy Lutomirski wrote:
> On 01/26/2014 01:08 AM, Qiaowei Ren wrote:
>> +1) Providing handlers for bounds faults (#BR).
>> +
>> +When MPX is enabled, there are 2 new situations that can generate
>> +#BR faults. If a bounds overflow occurs then a #BR is generated.
>> +The fault handler will decode MPX instructions to get violation
>> +address and set this address into extended struct siginfo.
>
> Can you document exactly where the insn address and pointer value end
> up?  (If it's in the (IMO hideous) cr2 field in ucontext, this needs to
> be documented.  If it's somewhere useful in siginfo, that should also be
> documented to save people the time it takes to figure it out.)
>
Ok. I will describe extended siginfo at this documentation.

Thanks,
Qiaowei
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