Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934702AbaBDVk5 (ORCPT ); Tue, 4 Feb 2014 16:40:57 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:52330 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933586AbaBDVkv (ORCPT ); Tue, 4 Feb 2014 16:40:51 -0500 Message-ID: <1391550040.3003.28.camel@deadeye.wl.decadent.org.uk> Subject: Re: [PATCH V3] net/dt: Add support for overriding phy configuration from device tree From: Ben Hutchings To: Florian Fainelli Cc: Matthew Garrett , netdev , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Kishon Vijay Abraham I Date: Tue, 04 Feb 2014 21:40:40 +0000 In-Reply-To: References: <7510122.cayuQ6qt8r@wuerfel> <1389999459-9483-1-git-send-email-matthew.garrett@nebula.com> Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-Cl4GTycUti78AzhdcRFk" X-Mailer: Evolution 3.8.5-2+b1 Mime-Version: 1.0 X-SA-Exim-Connect-IP: 192.168.4.239 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-Cl4GTycUti78AzhdcRFk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2014-02-04 at 12:39 -0800, Florian Fainelli wrote: > 2014-01-17 Matthew Garrett : > > Some hardware may be broken in interesting and board-specific ways, suc= h > > that various bits of functionality don't work. This patch provides a > > mechanism for overriding mii registers during init based on the content= s of > > the device tree data, allowing board-specific fixups without having to > > pollute generic code. >=20 > It would be good to explain exactly how your hardware is broken > exactly. I really do not think that such a fine-grained setting where > you could disable, e.g: 100BaseT_Full, but allow 100BaseT_Half to > remain usable makes that much sense. In general, Gigabit might be > badly broken, but 100 and 10Mbits/sec should work fine. How about the > MASTER-SLAVE bit, is overriding it really required? Yes, it is entirely possible that one or other of the clock modes (locally generated vs recovered) is not reliable. > Is not a PHY fixup registered for a specific OUI the solution you are > looking for? [...] The fault is in the board, not the PHY. Ben. --=20 Ben Hutchings One of the nice things about standards is that there are so many of them. --=-Cl4GTycUti78AzhdcRFk Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAUvFeWOe/yOyVhhEJAQpirA/+PmyKReUFK6DjC7cFUusU3xKKTESbGss9 fOMUi5Cb218mFx6bJi6AYqaK7W9EimD0SjzsV1E2NzAE+120/FcETG+nftYkhXjR 7/Zzyoxg2HFKAx/EhRznb1pmr0zS0b0ixQAI7Yc9MvV3pLUQwqrX2I8vcWHr0eyf ggdTO7NRe2CQZf8WRXrY4WGfNge6bVm95LmqP2cyMknMLNL8sip3G0I0V8CW/ni8 57d+0UTI128jNsNFtVIGgivyz5N4u727lexAFIvxStUuH3JN907YkKDTPRIJK78S 5qf57AdJNUJfgIhpzgnKFTG1+lXXf8ZYlBzTSp1pqdcXKHf2w9D6kLg1om1ZSgdl bOl0PWbtdqc7FU4cVrB0lAJluEy6ABSQSzZaMDlWT4NHR8gqRu5IaY68vib+AxyS odynOkWwY6b+hTSV9r2JCapcCd/2mcNgQ9E5N5pepO4bSL8CNlH5/m/PQnvjlxiq cWdaiHxu4wOxlAPnwScM2jgeFHOksLnCdFNQNFev9TUAgye7jYOiWgk5o/7E+lM1 hcGpA047u41ul6FLMMUuNnlbJV6aGnBNgjdEJiLqUbLYrA9MefcgJVWN90Wrcabk ftBseLlr/Jc8RNHr9fwPqOTaKxPotq6acquvrrsFfWsjWsTM+BI1Hs8REUTApahW blwiyDniAuQ= =fXK0 -----END PGP SIGNATURE----- --=-Cl4GTycUti78AzhdcRFk-- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/