Message-ID: <53037267.1000909@elopez.com.ar>
Date: Tue, 18 Feb 2014 11:47:03 -0300
From: =?ISO-8859-1?Q?Emilio_L=F3pez?= <emilio@elopez.com.ar>
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To: Maxime Ripard <maxime.ripard@free-electrons.com>,
        Mark Brown <broonie@kernel.org>,
        Mike Turquette <mturquette@linaro.org>
CC: linux-sunxi@googlegroups.com, linux-spi@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, kevin.z.m.zh@gmail.com,
        sunny@allwinnertech.com, shuge@allwinnertech.com,
        zhuzhenhua@allwinnertech.com
Subject: Re: [PATCH v4 1/5] clk: sunxi: Add support for PLL6 on the A31
References: <1391605507-30981-1-git-send-email-maxime.ripard@free-electrons.com> <1391605507-30981-2-git-send-email-maxime.ripard@free-electrons.com>
In-Reply-To: <1391605507-30981-2-git-send-email-maxime.ripard@free-electrons.com>
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Sender: linux-kernel-owner@vger.kernel.org

El 05/02/14 10:05, Maxime Ripard escribi?:
> The A31 has a slightly different PLL6 clock. Add support for this new clock in
> our driver.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Taken via sunxi-clk-for-mike.

Thanks!

Emilio
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