Date: Sat, 22 Feb 2014 11:47:09 +0900
From: Mark Brown <broonie@kernel.org>
To: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Cc: lee.jones@linaro.org, sameo@linux.intel.com,
        patches@opensource.wolfsonmicro.com, linux-kernel@vger.kernel.org
Message-ID: <20140222024709.GK25940@sirena.org.uk>
References: <1392913608-23479-1-git-send-email-ckeepax@opensource.wolfsonmicro.com>
 <20140220233058.GC12197@sirena.org.uk>
 <20140221093855.GC5438@opensource.wolfsonmicro.com>
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In-Reply-To: <20140221093855.GC5438@opensource.wolfsonmicro.com>
User-Agent: Mutt/1.5.21 (2010-09-15)
Subject: Re: [PATCH] mfd: wm5102: Remove cache_bypass from manual register
 patching
Sender: linux-kernel-owner@vger.kernel.org


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On Fri, Feb 21, 2014 at 09:38:55AM +0000, Charles Keepax wrote:

> I guess there are two parts here applying the hardware patch and
> the manual application of the register patch. Applying the
> hardware patch restores registers once it is finished anyway, and
> the actual patch is applied by the write sequencer so will go
> straight to the hardware. So that really doesn't need the
> cache_bypass.

Yeah, it's only the manually applied bit that cares.

> > Being able to use the regular patch infrastructure would of course be
> > nicer but you're going to need to add a callback to allow you to run the
> > hardware patch in that case.

> I had considered adding bypassed versions of regmap_write and
> read. That way you could ensure that the bypass was only active
> whilst the regmap lock was held and avoid the problem that way.
> What do you think to that idea?

I think that's a reasonable idea, though I see you actually did
something slightly different (which is sensible and in fact there
already).

Thinking about this stuff there's also some ideas I discussed with
Dimitris for the DSP memories where if it were possible to mark only a
section of the register map as cache only the DSP download could be sped
up a little by making the DSP memories cache only during download and
then syncing at the end to do the actual writes.  That way coefficient
writes that change defaults in the firmware would get coalesced and
possibly some writes to adjacent blocks could be combined too.  Probably
not a massive win but it'd be nice.

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