Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752782AbaBXOyO (ORCPT ); Mon, 24 Feb 2014 09:54:14 -0500 Received: from mail-ob0-f180.google.com ([209.85.214.180]:57806 "EHLO mail-ob0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752553AbaBXOyL (ORCPT ); Mon, 24 Feb 2014 09:54:11 -0500 MIME-Version: 1.0 In-Reply-To: References: <1391529538-21685-1-git-send-email-ulf.hansson@linaro.org> <1391529538-21685-4-git-send-email-ulf.hansson@linaro.org> <20140218160542.GH21483@n2100.arm.linux.org.uk> Date: Mon, 24 Feb 2014 15:54:10 +0100 Message-ID: Subject: Re: [PATCH 03/17] mmc: mmci: Mask IRQs for all variants during runtime suspend From: Linus Walleij To: Ulf Hansson Cc: Russell King - ARM Linux , "linux-arm-kernel@lists.infradead.org" , Alessandro Rubini , Wolfram Sang , Chris Ball , Mark Brown , "linux-kernel@vger.kernel.org" , "linux-i2c@vger.kernel.org" , "linux-spi@vger.kernel.org" , linux-mmc Content-Type: text/plain; charset=ISO-8859-1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 18, 2014 at 5:36 PM, Ulf Hansson wrote: > On 18 February 2014 17:05, Russell King - ARM Linux > wrote: >> On Tue, Feb 04, 2014 at 04:58:44PM +0100, Ulf Hansson wrote: >>> In runtime suspended state, we are not expecting IRQs and thus we can >>> safely mask them, not only for pwrreg_nopower variants but for all. >>> >>> Obviously we then also need to make sure we restore the IRQ mask while >>> becoming runtime resumed. >> >> So, what happens when this patch is applied, and a SDIO card is attached >> which expects to receive interrupts at any moment? > > Currently, no variant implements SDIO irq. > > The SDIO irq polling mode from the sdio core will still be functional, > as of today. So, this patch will not break SDIO. > >> >> Given that I've run into this during the last week with a SDHCI controller, >> I'm not that thrilled with other interfaces doing the same broken thing. > > If we add SDIO irq support to mmci in future; parts of that > implementation includes a re-route of DAT1 to a GPIO irq when entering > runtime suspend state. The mmci HW will in runtime suspend state, not > be responsible for handling irqs, which is the same as of today. [Just smalltalk] Switching DAT1 to "gpio mode" (which is something of a fallacy, see explanation in Documentation/pinctrl.txt) is not at all possible in all implementations of the PL18x, as it depends on exploiting properties on an assumed pin controller. Systems that don't have such wakeup features on their pins are unlikely to support deepsleep in any capacity, and if they do they are ill-designed from the top level as this needs to be taken into account when devising the hardware :-/ Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/