Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756633AbaDBABR (ORCPT ); Tue, 1 Apr 2014 20:01:17 -0400 Received: from mail-pb0-f54.google.com ([209.85.160.54]:63460 "EHLO mail-pb0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755699AbaDBABN (ORCPT ); Tue, 1 Apr 2014 20:01:13 -0400 MIME-Version: 1.0 In-Reply-To: <1396396559-6971-1-git-send-email-holler@ahsoftware.de> References: <1396396559-6971-1-git-send-email-holler@ahsoftware.de> From: Florian Fainelli Date: Tue, 1 Apr 2014 17:00:30 -0700 Message-ID: Subject: Re: [PATCH regression] net: phy: fix initialization (config_init) for Marvel 88E1116R PHYs To: Alexander Holler Cc: "linux-kernel@vger.kernel.org" , netdev , Michal Simek , stable Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2014-04-01 16:55 GMT-07:00 Alexander Holler : > Commit 7cd1463664c2a15721ff4ccfb61d4d970815cb3d (introduced with 3.14) Please specify the commit message in parenthesis. > changed the initialization of the mv643xx_eth driver to use phy_init_hw() > to reset the PHY. Unfortunately the initialization for the 88E1116R PHY > was broken such, that it used mdelay() instead of really waiting for a > reset to finish. > > The effect was that the ethernet on my Kirkwood 88F6281 based device didn't > come up anymore (no carrier). > > Fix this by waiting for a reset to finish before proceeding further. > > Signed-off-by: Alexander Holler > > Cc: Michal Simek > Cc: Florian Fainelli > Cc: > --- > drivers/net/phy/marvell.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c > index bd37e45..5b84808 100644 > --- a/drivers/net/phy/marvell.c > +++ b/drivers/net/phy/marvell.c > @@ -396,7 +396,9 @@ static int m88e1116r_config_init(struct phy_device *phydev) > if (err < 0) > return err; > > - mdelay(500); > + do > + temp = phy_read(phydev, MII_BMCR); > + while (temp & BMCR_RESET); Please use genphy_soft_reset() which ensures that the bit is cleared, and will also wait for an appropriate amount of time before returning. I had a bunch of local patches waiting for net-next which clean up the Marvell PHY driver to use genphy_soft_reset() consistently instead of open-coding BMCR_RESET without waiting for the bit to get cleared. > > err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0); > if (err < 0) > @@ -429,7 +431,9 @@ static int m88e1116r_config_init(struct phy_device *phydev) > if (err < 0) > return err; > > - mdelay(500); > + do > + temp = phy_read(phydev, MII_BMCR); > + while (temp & BMCR_RESET); Ditto. > > return 0; > } > -- > 1.8.3.1 > -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/