Date: Mon, 7 Apr 2014 15:42:52 +0100
From: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
To: "Westerberg, Mika" <mika.westerberg@intel.com>
Cc: "Du, Wenkai" <wenkai.du@intel.com>,
        "linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
        Wolfram Sang <wsa@the-dreams.de>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] i2c-designware: Mask interrupts during i2c controller
 enable
Message-ID: <20140407154252.6b8f0f7e@alan.etchedpixels.co.uk>
In-Reply-To: <20140407090403.GG19349@intel.com>
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	<7286EAF50D3F4E4AADE7FEECEBF8B5A537A70F8B@ORSMSX109.amr.corp.intel.com>
	<20140404184232.GC19349@intel.com>
	<7286EAF50D3F4E4AADE7FEECEBF8B5A537A71351@ORSMSX109.amr.corp.intel.com>
	<20140405061316.GF19349@intel.com>
	<20140406185818.3aaca03d@alan.etchedpixels.co.uk>
	<20140407090403.GG19349@intel.com>
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> I had to check BYT specs about that and I couldn't find if it does
> posted-writes. 

Then I would assume it does unless you can find a hardware engineer to
sign a statement in blood to that effect 8)

> Actually the following patch should fix the problem as well. Just move the
> HW enable to happen last. That way we can make sure that there is a valid
> interrupt mask programmed before the controller is enabled.

This fixes the init case, it doesn't fix the question about returning
from the IRQ before the mask write takes effect and thus taking another
interrupt.

Alan
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