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Date: Mon, 11 Nov 2002 22:53:33 -0800 (PST)
Message-Id: <20021111.225333.122204472.davem@redhat.com>
To: hugh@veritas.com
Cc: akpm@digeo.com, dmccr@us.ibm.com, riel@conectiva.com.br,
       linux-kernel@vger.kernel.org
Subject: Re: [PATCH] flush_cache_page while pte valid 
From: "David S. Miller" <davem@redhat.com>
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References: <20021111.151929.31543489.davem@redhat.com>
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   From: Hugh Dickins <hugh@veritas.com>
   Date: Tue, 12 Nov 2002 06:53:04 +0000 (GMT)
   
   Thanks for shedding light on that; but I'm still wondering if there
   might be data loss if userspace modifies the page in the tiny window
   between correctly positioned flush_cache_page and pte invalidation?

The flush merely writes back the data, a copy-back operation, fully L2
cache coherent.  All cpus will see correct data if an intermittant
store occurs.
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