Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752165AbaDUPfV (ORCPT ); Mon, 21 Apr 2014 11:35:21 -0400 Received: from mail-vc0-f171.google.com ([209.85.220.171]:41851 "EHLO mail-vc0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751275AbaDUPfS (ORCPT ); Mon, 21 Apr 2014 11:35:18 -0400 MIME-Version: 1.0 In-Reply-To: <535535A1.4020501@ti.com> References: <1397917972-6293-1-git-send-email-santosh.shilimkar@ti.com> <535535A1.4020501@ti.com> Date: Mon, 21 Apr 2014 10:35:17 -0500 Message-ID: Subject: Re: [PATCH v2 0/7] of: setup dma parameters using dma-ranges and dma-coherent From: Rob Herring To: Santosh Shilimkar Cc: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , Greg Kroah-Hartman , Russell King , Arnd Bergmann , Olof Johansson , Grant Likely , Rob Herring , Catalin Marinas , Linus Walleij , Grygorii Strashko Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 21, 2014 at 10:13 AM, Santosh Shilimkar wrote: > Hi Rob, > > On Monday 21 April 2014 10:37 AM, Rob Herring wrote: >> On Sat, Apr 19, 2014 at 9:32 AM, Santosh Shilimkar >> wrote: >>> Here is an updated version of [2] based on discussion. Series introduces >>> support for setting up dma parameters based on device tree properties >>> like 'dma-ranges' and 'dma-coherent' and also update to ARM 32 bit port. >>> Earlier version of the same series is here [1]. >>> >>> The 'dma-ranges' helps to take care of few DMAable system memory restrictions >>> by use of dma_pfn_offset which we maintain now per device. Arch code then >>> uses it for dma address translations for such cases. We update the >>> dma_pfn_offset accordingly during DT the device creation process.The >>> 'dma-coherent' property is used to setup arch's coherent dma_ops. >>> >>> After some off-list discussion with RMK and Arnd, I have now dropped the >>> controversial dma_mask setup code from the series which actually isn't blocking >>> me as such. Considering rest of the parts of the series are already aligned, >>> am hoping to get this version merged for 3.16 merge window. >> >> Can you briefly describe what the h/w looks like in terms of addresses >> for the problem you are trying to solve? Something like: Cpu view of >> RAM is X to Y address, X corresponds to DMA address Z. Max DMA address >> is ? >> > Let me try with say 8 GB RAM example > > CPU view of memory : 0x0000 0008 0000 0000 to 0x0000 000a 0000 0000 > > From above memory range, first 2 GB of memory has an alias 32 bit > view in the hardware. Hardware internally map the address issued within > that first 2 GB to same memory. > > DMA view of first 2 GB [ 0x0000 0008 0000 0000 to 0x0000 0008 7fff ffff] > is : 0x8000 0000 to 0xffff fffff. Are you setting ZONE_DMA to be 2GB so allocations stay within DMAable memory and that is enough that you don't need to set DMA masks? Rob -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/